From patchwork Wed Sep 4 03:46:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2853479 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5119BC0AB5 for ; Wed, 4 Sep 2013 03:47:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 688002034A for ; Wed, 4 Sep 2013 03:47:54 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B2C620324 for ; Wed, 4 Sep 2013 03:47:53 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VH43j-0004FK-CB; Wed, 04 Sep 2013 03:47:13 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VH43K-00022X-CB; Wed, 04 Sep 2013 03:46:46 +0000 Received: from mail-pb0-x233.google.com ([2607:f8b0:400e:c01::233]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VH43H-00021x-Gi for linux-arm-kernel@lists.infradead.org; Wed, 04 Sep 2013 03:46:44 +0000 Received: by mail-pb0-f51.google.com with SMTP id jt11so6896923pbb.10 for ; Tue, 03 Sep 2013 20:46:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=J+Ft0KA/qGIU3gIYABREbsDCY15I2CWz/Rz810wfiDQ=; b=pmKm2am8sT0VuNxym628jafdVg59MHYApNDWNlMYpPXFrIdjMg11oYZufY0sId9/pV UMJ+6/iw3z3lvMcA8BGPeffhK/egYwy2yDx3z+klMTS58YpBieJU4TlFWbexqZtsLVsL yVKWvLQV5c0k3hnQBqh8zK+ch6JaBp4CuKVpWVeisrSEwJsK8aUOWU01lMqpKAfqnG7X G4SL5nArTCyRfUd72f3WxzgW+j11+Zlt9XywqP9yg19sf2+7VD6xTQXSkI1kgGM+oKL1 xtpV3jRs8V6O+cqkgjRYo3QfOA+MXAstCNWttS4dKYWo07RYj98TEHadso1ISr5nohjZ YMkw== X-Received: by 10.68.189.70 with SMTP id gg6mr876956pbc.123.1378266381573; Tue, 03 Sep 2013 20:46:21 -0700 (PDT) Received: from [127.0.0.1] (ac230065.ppp.asahi-net.or.jp. [183.77.230.65]) by mx.google.com with ESMTPSA id sb9sm26041186pbb.0.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Sep 2013 20:46:20 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Wed, 04 Sep 2013 12:46:17 +0900 Message-Id: <20130904034617.12546.91307.sendpatchset@w520> In-Reply-To: <20130904034525.12546.24775.sendpatchset@w520> References: <20130904034525.12546.24775.sendpatchset@w520> Subject: [PATCH 03/04] ARM: shmobile: r8a7791 CMT support X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130903_234643_677092_87719BC1 X-CRM114-Status: GOOD ( 13.12 ) X-Spam-Score: -2.0 (--) Cc: ryo.kataoka.wt@renesas.com, kuninori.morimoto.gx@renesas.com, arnd@arndb.de, Magnus Damm , hisashi.nakamura.ak@renesas.com, horms@verge.net.au, yoshikazu.fujikawa.ue@renesas.com, olof@lixom.net, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add r8a7791 CMT support via channel 0 of CMT0. At this point the CMT is used for clock event operation, but in the future the arch timer will be the main timer and the CMT will be used for deep sleep wake up only. Signed-off-by: Magnus Damm --- arch/arm/mach-shmobile/clock-r8a7791.c | 7 +++++- arch/arm/mach-shmobile/include/mach/r8a7791.h | 1 arch/arm/mach-shmobile/setup-r8a7791.c | 29 +++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 1 deletion(-) --- 0004/arch/arm/mach-shmobile/clock-r8a7791.c +++ work/arch/arm/mach-shmobile/clock-r8a7791.c 2013-09-03 21:02:44.000000000 +0900 @@ -101,7 +101,7 @@ SH_FIXED_RATIO_CLK_SET(cp_clk, extal_c SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2); SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12); SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); - +SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); static struct clk *main_clks[] = { @@ -113,6 +113,7 @@ static struct clk *main_clks[] = { &pll3_clk, &hp_clk, &p_clk, + &rclk_clk, &mp_clk, &cp_clk, }; @@ -123,6 +124,7 @@ enum { MSTP719, MSTP718, MSTP715, MSTP714, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107, + MSTP124, MSTP_NR }; @@ -142,6 +144,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */ [MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */ [MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */ + [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ }; static struct clk_lookup lookups[] = { @@ -155,6 +158,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("pll3", &pll3_clk), CLKDEV_CON_ID("hp", &hp_clk), CLKDEV_CON_ID("p", &p_clk), + CLKDEV_CON_ID("rclk", &rclk_clk), CLKDEV_CON_ID("mp", &mp_clk), CLKDEV_CON_ID("cp", &cp_clk), CLKDEV_CON_ID("peripheral_clk", &hp_clk), @@ -175,6 +179,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */ CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */ + CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), }; #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ --- 0004/arch/arm/mach-shmobile/include/mach/r8a7791.h +++ work/arch/arm/mach-shmobile/include/mach/r8a7791.h 2013-09-03 20:56:52.000000000 +0900 @@ -3,5 +3,6 @@ void r8a7791_add_dt_devices(void); void r8a7791_clock_init(void); +void r8a7791_init_early(void); #endif /* __ASM_R8A7791_H__ */ --- 0004/arch/arm/mach-shmobile/setup-r8a7791.c +++ work/arch/arm/mach-shmobile/setup-r8a7791.c 2013-09-03 20:57:19.000000000 +0900 @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -89,6 +90,25 @@ static inline void r8a7791_register_scif sizeof(struct plat_sci_port)); } +static const struct sh_timer_config cmt00_platform_data __initconst = { + .name = "CMT00", + .timer_bit = 0, + .clockevent_rating = 80, +}; + +static const struct resource cmt00_resources[] __initconst = { + DEFINE_RES_MEM(0xffca0510, 0x0c), + DEFINE_RES_MEM(0xffca0500, 0x04), + DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */ +}; + +#define r8a7791_register_cmt(idx) \ + platform_device_register_resndata(&platform_bus, "sh_cmt", \ + idx, cmt##idx##_resources, \ + ARRAY_SIZE(cmt##idx##_resources), \ + &cmt##idx##_platform_data, \ + sizeof(struct sh_timer_config)) + void __init r8a7791_add_dt_devices(void) { r8a7791_register_scif(SCIFA0); @@ -106,6 +126,14 @@ void __init r8a7791_add_dt_devices(void) r8a7791_register_scif(SCIFA3); r8a7791_register_scif(SCIFA4); r8a7791_register_scif(SCIFA5); + r8a7791_register_cmt(00); +} + +void __init r8a7791_init_early(void) +{ +#ifndef CONFIG_ARM_ARCH_TIMER + shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */ +#endif } #ifdef CONFIG_USE_OF @@ -115,6 +143,7 @@ static const char *r8a7791_boards_compat }; DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") + .init_early = r8a7791_init_early, .dt_compat = r8a7791_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */