From patchwork Wed Sep 18 20:11:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2909301 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BA79E9F1BF for ; Wed, 18 Sep 2013 20:12:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D51DB20222 for ; Wed, 18 Sep 2013 20:12:06 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCC2220213 for ; Wed, 18 Sep 2013 20:12:05 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMO62-0002S1-QY; Wed, 18 Sep 2013 20:11:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMO5t-00061C-7S; Wed, 18 Sep 2013 20:11:25 +0000 Received: from mail-pb0-x22d.google.com ([2607:f8b0:400e:c01::22d]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMO5n-0005yq-Rd for linux-arm-kernel@lists.infradead.org; Wed, 18 Sep 2013 20:11:22 +0000 Received: by mail-pb0-f45.google.com with SMTP id mc17so7473967pbc.32 for ; Wed, 18 Sep 2013 13:10:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=5RCbMGmwszMr2tNnvrfogOoWB3eh9J/v36fovv3JpXY=; b=l+8wW1YwqjrmVgQa/xomtBF76vvcOxmNyhHYO1UA2XzTQfAYQwjkGQFjWi1CwA+YWD NUuBB7A6JCj80ujljUVL/GHaM7KeuN838Uhm63pVW1C+BgCT5IvAXENN5H5dbkF8XwJ+ edh5b2vTf51zJk9aSkIfORdfXHGm6wLILTIFdsGBJ0o5YP+uhNUKlJpjPrvh9J6SCAdI 8RUoVcbuSR/+CIJGe2NfjpCFr2o/1DM27LM5tzwR5Ez3LuwR1/dLH/zxM80/YhwZSmy0 uwQ31Xk7EVt0c3C/RM35c9yay29ZkUaSX2okEds4kweqrJMM9ob1Dq0ZMheGCOK1ltNo Db6g== X-Received: by 10.68.32.228 with SMTP id m4mr15689073pbi.164.1379535058278; Wed, 18 Sep 2013 13:10:58 -0700 (PDT) Received: from [127.0.0.1] (ac230065.ppp.asahi-net.or.jp. [183.77.230.65]) by mx.google.com with ESMTPSA id fa4sm7062390pab.17.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Sep 2013 13:10:57 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Thu, 19 Sep 2013 05:11:20 +0900 Message-Id: <20130918201120.6319.59533.sendpatchset@w520> In-Reply-To: <20130918201101.6319.97667.sendpatchset@w520> References: <20130918201101.6319.97667.sendpatchset@w520> Subject: [PATCH 02/03] ARM: shmobile: r7s72100 SCIF support X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130918_161120_034430_76DEEB97 X-CRM114-Status: GOOD ( 11.42 ) X-Spam-Score: -2.0 (--) Cc: olof@lixom.net, horms@verge.net.au, Magnus Damm , linux-arm-kernel@lists.infradead.org, arnd@arndb.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add SCIF serial port support to the r7s72100 SoC by adding platform devices for SCIF0 -> SCIF7 together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by: Magnus Damm --- arch/arm/mach-shmobile/clock-r7s72100.c | 8 ++++ arch/arm/mach-shmobile/include/mach/r7s72100.h | 1 arch/arm/mach-shmobile/setup-r7s72100.c | 45 ++++++++++++++++++++++++ 3 files changed, 54 insertions(+) --- 0002/arch/arm/mach-shmobile/clock-r7s72100.c +++ work/arch/arm/mach-shmobile/clock-r7s72100.c 2013-09-19 03:47:24.000000000 +0900 @@ -170,6 +170,14 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), /* MSTP clocks */ + CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]), }; void __init r7s72100_clock_init(void) --- 0002/arch/arm/mach-shmobile/include/mach/r7s72100.h +++ work/arch/arm/mach-shmobile/include/mach/r7s72100.h 2013-09-19 03:47:24.000000000 +0900 @@ -1,6 +1,7 @@ #ifndef __ASM_R7S72100_H__ #define __ASM_R7S72100_H__ +void r7s72100_add_dt_devices(void); void r7s72100_clock_init(void); void r7s72100_init_early(void); --- 0002/arch/arm/mach-shmobile/setup-r7s72100.c +++ work/arch/arm/mach-shmobile/setup-r7s72100.c 2013-09-19 04:11:07.000000000 +0900 @@ -21,10 +21,55 @@ #include #include #include +#include #include +#include #include #include +#define SCIF_DATA(index, baseaddr, irq) \ +[index] = { \ + .type = PORT_SCIF, \ + .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \ + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ + .scbrr_algo_id = SCBRR_ALGO_2, \ + .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \ + SCSCR_REIE, \ + .mapbase = baseaddr, \ + .irqs = { irq + 1, irq + 2, irq + 3, irq }, \ +} + +enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 }; + +static const struct plat_sci_port scif[] __initconst = { + SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */ + SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */ + SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */ + SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */ + SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */ + SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */ + SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */ + SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */ +}; + +static inline void r7s72100_register_scif(int idx) +{ + platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], + sizeof(struct plat_sci_port)); +} + +void __init r7s72100_add_dt_devices(void) +{ + r7s72100_register_scif(SCIF0); + r7s72100_register_scif(SCIF1); + r7s72100_register_scif(SCIF2); + r7s72100_register_scif(SCIF3); + r7s72100_register_scif(SCIF4); + r7s72100_register_scif(SCIF5); + r7s72100_register_scif(SCIF6); + r7s72100_register_scif(SCIF7); +} + void __init r7s72100_init_early(void) { shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */