From patchwork Thu Nov 14 22:40:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 3185801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 098D8C045B for ; Thu, 14 Nov 2013 22:49:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C25720929 for ; Thu, 14 Nov 2013 22:49:43 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F2BD20928 for ; Thu, 14 Nov 2013 22:49:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh5jC-0004UH-3G; Thu, 14 Nov 2013 22:49:34 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh5j9-0007ZY-OB; Thu, 14 Nov 2013 22:49:31 +0000 Received: from mail-ie0-x22a.google.com ([2607:f8b0:4001:c03::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh5j2-0007Yf-Db; Thu, 14 Nov 2013 22:49:25 +0000 Received: by mail-ie0-f170.google.com with SMTP id to1so3808160ieb.29 for ; Thu, 14 Nov 2013 14:49:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=lA+FCXJjUY3hoqYxyEjszTGWsS0MchqlqfB0TPNcvp8=; b=pItW4SSlmfWe6odvM1eqb+7dSkJF4fgMYirVjS9NQ09Kd9YKJUjStAjwJbDE0nhEd/ s5JSIOqnORRQEk5RBSRq9exW3NOPG/yV8ZSGGr6zCOWzLt88GRqpvKhU3Ykl8WOltr++ Ur44pThusfUsGXtkNP1f/jEWef1wCfAJzb1hIierOJnqUqOoaxaFIB8XG8MJ4ymDqgqZ 4ndsKxwvL+bJsqU0/T4yo3a5yrh0BCVv2QYvvnuSTxupqchJRKCBCuBigNtz4Ud3Hclt 18XHgmCvRwpAxeyO4Tj4/u0BeTqvK0/vkYrrPcXzBtf5dnKc/izO3vggBOv/wim9caiC r/6w== X-Received: by 10.50.40.37 with SMTP id u5mr2962743igk.29.1384468860513; Thu, 14 Nov 2013 14:41:00 -0800 (PST) Received: from ld-irv-0074.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPSA id y10sm39505782igl.4.2013.11.14.14.40.59 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 14 Nov 2013 14:41:00 -0800 (PST) Date: Thu, 14 Nov 2013 14:40:56 -0800 From: Brian Norris To: Ezequiel Garcia Subject: Re: [PATCH v5 12/14] mtd: nand: pxa3xx: Introduce multiple page I/O support Message-ID: <20131114224056.GU9468@ld-irv-0074.broadcom.com> References: <1384464339-6817-1-git-send-email-ezequiel.garcia@free-electrons.com> <1384464339-6817-13-git-send-email-ezequiel.garcia@free-electrons.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1384464339-6817-13-git-send-email-ezequiel.garcia@free-electrons.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131114_174924_497449_0B65FF12 X-CRM114-Status: GOOD ( 15.12 ) X-Spam-Score: -2.0 (--) Cc: Lior Amsalem , Thomas Petazzoni , Gregory Clement , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Nov 14, 2013 at 06:25:37PM -0300, Ezequiel Garcia wrote: > --- a/drivers/mtd/nand/pxa3xx_nand.c > +++ b/drivers/mtd/nand/pxa3xx_nand.c > @@ -1151,7 +1288,28 @@ static int armada370_ecc_init(struct pxa3xx_nand_info *info, > struct nand_ecc_ctrl *ecc, > int strength, int page_size) > { > - /* Unimplemented yet */ > + if (strength == 4 && page_size == 4096) { I still think this sort of check can be improved just a bit. Can you comment on my additional diff, pasted below? (Not even compile-tested) > + info->ecc_bch = 1; > + info->chunk_size = 2048; > + info->spare_size = 32; > + info->ecc_size = 32; > + ecc->mode = NAND_ECC_HW; > + ecc->size = info->chunk_size; > + ecc->layout = &ecc_layout_4KB_bch4bit; > + ecc->strength = 16; > + return 1; > + > + } else if (strength == 8 && page_size == 4096) { > + info->ecc_bch = 1; > + info->chunk_size = 1024; > + info->spare_size = 0; > + info->ecc_size = 32; > + ecc->mode = NAND_ECC_HW; > + ecc->size = info->chunk_size; > + ecc->layout = &ecc_layout_4KB_bch8bit; > + ecc->strength = 16; > + return 1; > + } > return 0; > } > Brian diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 8cb6640..e219d75 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1363,9 +1363,13 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info, static int armada370_ecc_init(struct pxa3xx_nand_info *info, struct nand_ecc_ctrl *ecc, - int strength, int page_size) + int strength, int ecc_stepsize, int page_size) { - if (strength == 4 && page_size == 4096) { + /* + * Required ECC: 4-bit correction per 512 bytes + * Select: 16-bit correction per 2048 bytes + */ + if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) { info->ecc_bch = 1; info->chunk_size = 2048; info->spare_size = 32; @@ -1376,7 +1380,11 @@ static int armada370_ecc_init(struct pxa3xx_nand_info *info, ecc->strength = 16; return 1; - } else if (strength == 8 && page_size == 4096) { + /* + * Required ECC: 8-bit correction per 512 bytes + * Select: 16-bit correction per 1024 bytes + */ + } else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) { info->ecc_bch = 1; info->chunk_size = 1024; info->spare_size = 0; @@ -1484,6 +1492,7 @@ KEEP_CONFIG: if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) ret = armada370_ecc_init(info, &chip->ecc, chip->ecc_strength_ds, + chip->ecc_step_ds, mtd->writesize); else ret = pxa_ecc_init(info, &chip->ecc,