From patchwork Wed Nov 27 08:27:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 3246941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BE8689F3A0 for ; Wed, 27 Nov 2013 08:28:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8A92D20583 for ; Wed, 27 Nov 2013 08:28:14 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2DE45203E6 for ; Wed, 27 Nov 2013 08:28:13 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlaTG-0000V0-Ex; Wed, 27 Nov 2013 08:27:43 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlaT7-0003Yp-0u; Wed, 27 Nov 2013 08:27:33 +0000 Received: from mail-pb0-x234.google.com ([2607:f8b0:400e:c01::234]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlaSx-0003XU-Ua for linux-arm-kernel@lists.infradead.org; Wed, 27 Nov 2013 08:27:25 +0000 Received: by mail-pb0-f52.google.com with SMTP id uo5so9811954pbc.25 for ; Wed, 27 Nov 2013 00:27:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=FipiwsDzWxDHFYcbi/0omFRzdnGDpKBk9G2Sf0vjZbY=; b=A31iRb0Ov7TU6xSR2HThbZTSiLC7MRTwiQh3T1PH5IXA1d2ZM+cJ0fHFvtNj8gU69V TeqT+v388UfA4+Z0exQwd7+UVH2LNKJ2dqiwYmBzcIeEQ8o1V3g0GnwWmtw8ndDSAI9R Wq1GyPgrzuwJt7FXJwRnyLMOsaRgB9rMpY5E4qZCN23uFpEAm9wUtaNzptcgjTlvopO7 l0QIjCYNE49rk47HWKpoqPaEE4UeNojdztL2XjMcgxWbA563wD6BfEwBMtJE3KyugmEZ vhefwBwD/nA9x9yoaW3atgkkKG5jL7tQ/1NmJDRua3f+dyeIRhBfimCzl2LdH8LClpl+ QYOA== X-Received: by 10.66.253.169 with SMTP id ab9mr14772157pad.156.1385540822438; Wed, 27 Nov 2013 00:27:02 -0800 (PST) Received: from [127.0.0.1] (ac230065.ppp.asahi-net.or.jp. [183.77.230.65]) by mx.google.com with ESMTPSA id pe3sm55352284pbc.23.2013.11.27.00.26.59 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Nov 2013 00:27:01 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Wed, 27 Nov 2013 17:27:45 +0900 Message-Id: <20131127082745.20015.57024.sendpatchset@w520> In-Reply-To: <20131127082736.20015.21303.sendpatchset@w520> References: <20131127082736.20015.21303.sendpatchset@w520> Subject: [PATCH 01/04] ARM: shmobile: r7s72100 GPIO and PINCTRL device nodes X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131127_032724_134225_9D10F05D X-CRM114-Status: UNSURE ( 8.38 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) Cc: wsa@the-dreams.de, linus.walleij@linaro.org, Magnus Damm , horms@verge.net.au, laurent.pinchart@ideasonboard.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add support for r7s72100 PFC and GPIO device nodes port0 -> port11 and jtagport0. Signed-off-by: Magnus Damm --- arch/arm/boot/dts/r7s72100.dtsi | 154 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 154 insertions(+) --- 0001/arch/arm/boot/dts/r7s72100.dtsi +++ work/arch/arm/boot/dts/r7s72100.dtsi 2013-11-27 16:06:36.000000000 +0900 @@ -14,6 +14,22 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + gpio0 = &port0; + gpio1 = &port1; + gpio2 = &port2; + gpio3 = &port3; + gpio4 = &port4; + gpio5 = &port5; + gpio6 = &port6; + gpio7 = &port7; + gpio8 = &port8; + gpio9 = &port9; + gpio10 = &port10; + gpio11 = &port11; + gpio12 = &jtagport0; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -33,4 +49,142 @@ reg = <0xe8201000 0x1000>, <0xe8202000 0x1000>; }; + + pfc: pfc@fcfe3300 { + compatible = "renesas,pfc-r7s72100"; + reg = <0xfcfe3300 0x400>, /* PM, PMC, PFC, PFCE */ + <0xfcfe3a00 0x100>, /* PFCAE */ + <0xfcfe7000 0x300>, /* PIBC, PBDC, PIPC */ + <0xfcfe7b40 0x04>, /* JPMC */ + <0xfcfe7b90 0x04>, /* JPMCSR */ + <0xfcfe7f00 0x04>; /* JPIBC */ + }; + + port0: gpio@fcfe3100 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3100 0x4>, /* PSR */ + <0xfcfe3200 0x2>, /* PPR */ + <0xfcfe3800 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 6>; + }; + + port1: gpio@fcfe3104 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3104 0x4>, /* PSR */ + <0xfcfe3204 0x2>, /* PPR */ + <0xfcfe3804 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 16 16>; + }; + + port2: gpio@fcfe3108 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3108 0x4>, /* PSR */ + <0xfcfe3208 0x2>, /* PPR */ + <0xfcfe3808 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 16>; + }; + + port3: gpio@fcfe310c { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe310c 0x4>, /* PSR */ + <0xfcfe320c 0x2>, /* PPR */ + <0xfcfe380c 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 48 16>; + }; + + port4: gpio@fcfe3110 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3110 0x4>, /* PSR */ + <0xfcfe3210 0x2>, /* PPR */ + <0xfcfe3810 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 16>; + }; + + port5: gpio@fcfe3114 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3114 0x4>, /* PSR */ + <0xfcfe3214 0x2>, /* PPR */ + <0xfcfe3814 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 80 11>; + }; + + port6: gpio@fcfe3118 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3118 0x4>, /* PSR */ + <0xfcfe3218 0x2>, /* PPR */ + <0xfcfe3818 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 16>; + }; + + port7: gpio@fcfe311c { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe311c 0x4>, /* PSR */ + <0xfcfe321c 0x2>, /* PPR */ + <0xfcfe381c 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 112 16>; + }; + + port8: gpio@fcfe3120 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3120 0x4>, /* PSR */ + <0xfcfe3220 0x2>, /* PPR */ + <0xfcfe3820 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 16>; + }; + + port9: gpio@fcfe3124 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3124 0x4>, /* PSR */ + <0xfcfe3224 0x2>, /* PPR */ + <0xfcfe3824 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 144 8>; + }; + + port10: gpio@fcfe3128 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe3128 0x4>, /* PSR */ + <0xfcfe3228 0x2>, /* PPR */ + <0xfcfe3828 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 16>; + }; + + port11: gpio@fcfe312c { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe312c 0x4>, /* PSR */ + <0xfcfe322c 0x2>, /* PPR */ + <0xfcfe382c 0x4>; /* PMSR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 176 16>; + }; + + jtagport0: gpio@fcfe7b20 { + compatible = "renesas,gpio-r7s72100", "renesas,gpio-rz"; + reg = <0xfcfe7b20 0x2>; /* JPPR */ + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 2>; + }; };