From patchwork Thu Dec 19 12:36:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 3379251 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EAE719F314 for ; Thu, 19 Dec 2013 12:38:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5763720117 for ; Thu, 19 Dec 2013 12:38:31 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D0E82060F for ; Thu, 19 Dec 2013 12:38:30 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VtcrJ-0003wI-2h; Thu, 19 Dec 2013 12:37:45 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vtcr6-0007Cm-Nj; Thu, 19 Dec 2013 12:37:32 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vtcqo-00079a-E0 for linux-arm-kernel@lists.infradead.org; Thu, 19 Dec 2013 12:37:15 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Thu, 19 Dec 2013 04:36:57 -0800 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Thu, 19 Dec 2013 04:39:01 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 19 Dec 2013 04:39:01 -0800 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.327.1; Thu, 19 Dec 2013 04:36:56 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw02.nvidia.com with MailMarshal (v7,1,2,5326) id ; Thu, 19 Dec 2013 04:36:56 -0800 Received: from [127.0.1.1] (tamien.nvidia.com [172.17.186.57]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id rBJCauol012891; Thu, 19 Dec 2013 04:36:56 -0800 (PST) Subject: [PATCH 2/6] ARM: tegra114: fuse: add DFLL FCPU minimum voltage override test function From: Paul Walmsley To: , Date: Thu, 19 Dec 2013 04:36:56 -0800 Message-ID: <20131219123652.3226.98741.stgit@tamien> In-Reply-To: <20131219122857.3226.42830.stgit@tamien> References: <20131219122857.3226.42830.stgit@tamien> User-Agent: StGit/0.17.1-1-g74fd MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131219_073714_716452_BC380F3E X-CRM114-Status: GOOD ( 11.82 ) X-Spam-Score: -2.4 (--) Cc: Thierry Reding , Stephen Warren X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a function to test the internal Tegra114 chip fuse that indicates whether the VDD_CPU lower voltage limit for the fast CPU cluster should be overridden. Signed-off-by: Paul Walmsley Cc: Stephen Warren Cc: Thierry Reding --- arch/arm/mach-tegra/fuse.c | 26 ++++++++++++++++++++++++++ include/linux/tegra-soc.h | 2 ++ 2 files changed, 28 insertions(+) diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index e3ca8abe858f..42477aa1b7e9 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -47,6 +47,15 @@ #define TEGRA20_FUSE_SPARE_BIT 0x200 #define TEGRA30_FUSE_SPARE_BIT 0x244 +/* + * TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE: Spare eFuse ID that indicates + * whether the minimum VDD_CPU voltage level that the DFLL is + * characterized for should be overridden to 900mVdc. If unset, the + * voltage shouldn't be overridden - it will be whatever has been + * selected by the CPU Speedo and process IDs. + */ +#define TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE 61 + int tegra_sku_id; int tegra_cpu_process_id; int tegra_core_process_id; @@ -265,3 +274,20 @@ int tegra_get_cpu_speedo_id(void) return tegra_cpu_speedo_id; } EXPORT_SYMBOL(tegra_get_cpu_speedo_id); + +/** + * tegra114_fuse_read_min_vdd_cpu_override - override DFLL VDD_CPU minimum? + * + * Returns true if the minimum VDD_CPU voltage level that the DFLL is + * characterized for is 900mVdc. If false, the minimum voltage should + * be whatever has been selected by the CPU Speedo and process IDs. + */ +bool tegra114_fuse_read_min_vdd_cpu_override(void) +{ + if (tegra_chip_id != TEGRA114) + return -EINVAL; + + return tegra_spare_fuse(TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE) ? true : + false; +} +EXPORT_SYMBOL(tegra114_fuse_read_min_vdd_cpu_override); diff --git a/include/linux/tegra-soc.h b/include/linux/tegra-soc.h index ec856fdf2ce7..fe2ab641555e 100644 --- a/include/linux/tegra-soc.h +++ b/include/linux/tegra-soc.h @@ -21,4 +21,6 @@ u32 tegra_read_chipid(void); int tegra_get_cpu_process_id(void); int tegra_get_cpu_speedo_id(void); +bool tegra114_fuse_read_min_vdd_cpu_override(void); + #endif /* __LINUX_TEGRA_SOC_H_ */