From patchwork Sun Feb 23 21:40:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 3704881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5C5869F35F for ; Sun, 23 Feb 2014 21:41:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 67E2E201E9 for ; Sun, 23 Feb 2014 21:41:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7050B20120 for ; Sun, 23 Feb 2014 21:41:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WHgnB-0006UU-AH; Sun, 23 Feb 2014 21:40:57 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WHgn1-0000ty-GX; Sun, 23 Feb 2014 21:40:47 +0000 Received: from galois.linutronix.de ([2001:470:1f0b:db:abcd:42:0:1]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WHgml-0000nf-A5 for linux-arm-kernel@lists.infradead.org; Sun, 23 Feb 2014 21:40:32 +0000 Received: from localhost ([127.0.0.1] helo=ionos.tec.linutronix.de) by Galois.linutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1WHgmI-0003ry-EV; Sun, 23 Feb 2014 22:40:02 +0100 Message-Id: <20140223212737.099151500@linutronix.de> User-Agent: quilt/0.60-1 Date: Sun, 23 Feb 2014 21:40:12 -0000 From: Thomas Gleixner To: LKML Subject: [patch 08/26] arm: Replace various irq_desc accesses References: <20140223212703.511977310@linutronix.de> Content-Disposition: inline; filename=arm-replace-various-irq-to-desc-accesses.patch X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1, SHORTCIRCUIT=-0.0001 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140223_164031_596764_1EF0632A X-CRM114-Status: GOOD ( 10.87 ) X-Spam-Score: -2.4 (--) Cc: omap , Peter Zijlstra , Tony Lindgren , Russell King , Ingo Molnar , Shawn Guo , arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use the proper functions. There is no need to fiddle with irq_desc. Signed-off-by: Thomas Gleixner Cc: Shawn Guo Cc: arm Cc: omap Cc: Tony Lindgren Cc: Russell King Acked-by: Shawn Guo Acked-by: Tony Lindgren --- arch/arm/mach-imx/pm-imx6q.c | 7 +++---- arch/arm/mach-omap1/ams-delta-fiq.c | 7 ++----- 2 files changed, 5 insertions(+), 9 deletions(-) Index: tip/arch/arm/mach-imx/pm-imx6q.c =================================================================== --- tip.orig/arch/arm/mach-imx/pm-imx6q.c +++ tip/arch/arm/mach-imx/pm-imx6q.c @@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable) int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) { - struct irq_desc *iomuxc_irq_desc; + struct irq_data *iomuxc_irq_data = irq_get_irq_data(32); u32 val = readl_relaxed(ccm_base + CLPCR); val &= ~BM_CLPCR_LPM; @@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode * 3) Software should mask IRQ #32 right after CCM Low-Power mode * is set (set bits 0-1 of CCM_CLPCR). */ - iomuxc_irq_desc = irq_to_desc(32); - imx_gpc_irq_unmask(&iomuxc_irq_desc->irq_data); + imx_gpc_irq_unmask(iomuxc_irq_data); writel_relaxed(val, ccm_base + CLPCR); - imx_gpc_irq_mask(&iomuxc_irq_desc->irq_data); + imx_gpc_irq_mask(iomuxc_irq_data); return 0; } Index: tip/arch/arm/mach-omap1/ams-delta-fiq.c =================================================================== --- tip.orig/arch/arm/mach-omap1/ams-delta-fiq.c +++ tip/arch/arm/mach-omap1/ams-delta-fiq.c @@ -44,13 +44,10 @@ static unsigned int irq_counter[16]; static irqreturn_t deferred_fiq(int irq, void *dev_id) { - struct irq_desc *irq_desc; - struct irq_chip *irq_chip = NULL; int gpio, irq_num, fiq_count; + struct irq_chip *irq_chip; - irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); - if (irq_desc) - irq_chip = irq_desc->irq_data.chip; + irq_chip = irq_get_irq_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); /* * For each handled GPIO interrupt, keep calling its interrupt handler