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[220.157.214.90]) by mx.google.com with ESMTPSA id ix2sm34163246pbc.45.2014.04.06.23.02.42 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 06 Apr 2014 23:02:43 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Mon, 07 Apr 2014 15:04:21 +0900 Message-Id: <20140407060421.25826.64819.sendpatchset@w520> Subject: [PATCH] ARM: shmobile: r8a7791: Add EHCI MSTP clock X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140407_020312_412876_16FD0DFE X-CRM114-Status: UNSURE ( 7.77 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) Cc: horms@verge.net.au, Magnus Damm , laurent.pinchart@ideasonboard.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add support for EHCI clock gating via the MSTP703 bit on r8a7791. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart --- Written against renesas-devel-v3.14-20140403 arch/arm/boot/dts/r8a7791.dtsi | 6 +++--- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) --- 0001/arch/arm/boot/dts/r8a7791.dtsi +++ work/arch/arm/boot/dts/r8a7791.dtsi 2014-04-07 14:49:43.000000000 +0900 @@ -774,19 +774,19 @@ mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; - clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, + clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 + R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1 R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0 R8A7791_CLK_LVDS0 >; clock-output-names = - "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", + "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0"; }; mstp8_clks: mstp8_clks@e6150990 { --- 0001/include/dt-bindings/clock/r8a7791-clock.h +++ work/include/dt-bindings/clock/r8a7791-clock.h 2014-04-07 14:49:43.000000000 +0900 @@ -63,6 +63,7 @@ #define R8A7791_CLK_PWM 23 /* MSTP7 */ +#define R8A7791_CLK_EHCI 3 #define R8A7791_CLK_HSUSB 4 #define R8A7791_CLK_HSCIF2 13 #define R8A7791_CLK_SCIF5 14