From patchwork Sat May 3 17:39:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rabin Vincent X-Patchwork-Id: 4106261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 646829F1E1 for ; Sat, 3 May 2014 17:42:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 69AC220263 for ; Sat, 3 May 2014 17:42:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E3D3020219 for ; Sat, 3 May 2014 17:42:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgduT-0008KK-Pg; Sat, 03 May 2014 17:39:37 +0000 Received: from mail-lb0-x234.google.com ([2a00:1450:4010:c04::234]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgduQ-0008Jb-IM for linux-arm-kernel@lists.infradead.org; Sat, 03 May 2014 17:39:35 +0000 Received: by mail-lb0-f180.google.com with SMTP id w7so4084997lbi.25 for ; Sat, 03 May 2014 10:39:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=U7kaV3Al08Q8+36m5nFoD/VB6SQZkfph5yJDRaIFARQ=; b=wj2whP5GY4Noug9zYTn5uXwNGDdoOuCIMOv0EHrhNB9DJMZ9Zwsa3JzsGKG6I60EkI CT9rcm36CRQs/ddM64RqX9axQ5Yz71k12NCDReYnvf5neX+289PzIo2/nAy0rESbQ3oT Gv4Vv1actCCWh6gRMC0+D1UXYmk8RMPEroImOLJt+MMOr+KxnV3hbDiR4JXI95sFafJe KYhTIblUafMww1NsepJsCR3rIxX04mMtH1oP/AZu1muwwyzc9iASR1eI+x+MzYJTsIac JU6H9zsBBkt/EoR6Rh5lCOcSMLPNuK88K5EVmjQKH9Syag53DwJM61l1RlvW95LEZl6o X+GA== X-Received: by 10.152.23.233 with SMTP id p9mr4043150laf.31.1399138751092; Sat, 03 May 2014 10:39:11 -0700 (PDT) Received: from debian (217-211-190-200-no39.tbcn.telia.com. [217.211.190.200]) by mx.google.com with ESMTPSA id q6sm2624356lal.3.2014.05.03.10.39.09 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sat, 03 May 2014 10:39:10 -0700 (PDT) Date: Sat, 3 May 2014 19:39:03 +0200 From: Rabin Vincent To: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= Subject: Re: [PATCH] ARM: fix v7-M signal return Message-ID: <20140503173903.GA16300@debian> References: <1398103664-23078-1-git-send-email-rabin@rab.in> <20140428082757.GD28564@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140428082757.GD28564@pengutronix.de> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140503_103934_813212_5F970B97 X-CRM114-Status: GOOD ( 17.64 ) X-Spam-Score: 0.0 (/) Cc: Catalin Marinas , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, Apr 28, 2014 at 10:27:57AM +0200, Uwe Kleine-König wrote: > This is a valid fix, but it seems on my efm32 the unpredictable > behaviour is to just discard the LSB. How did you find that? Is it an > issue on your machine? Which cpu are you using? I'm running this on QEMU. Here is an old qemu-devel thread on this topic if you are interested: http://lists.gnu.org/archive/html/qemu-devel/2012-03/msg00158.html > I'd like to have the instruction clearing the thumb bit above the > comment about the basic exception frame and please add a comment for > your instruction, too. OK, here is a v2 with those changes: 8<------------------ From 4aa76f95a6ecf781eec89dba8a3884e5e4339182 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Sat, 3 May 2014 19:27:09 +0200 Subject: [PATCHv2] ARM: fix v7-M signal return According to the ARM ARM, the behaviour is UNDPREDICTABLE if the PC read from the exception return stack is not half word aligned. See the pseudo code for ExceptionReturn() and PopStack(). The signal handler's address has the bit 0 set, and setup_return() directly writes this to regs->ARM_pc. Mask out bit 0 before the exception return to get predictable behaviour. Signed-off-by: Rabin Vincent --- arch/arm/kernel/entry-header.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 1420725..743dff6 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -132,6 +132,9 @@ orrne r5, V7M_xPSR_FRAMEPTRALIGN biceq r5, V7M_xPSR_FRAMEPTRALIGN + @ ensure bit 0 is cleared in the PC + bic r4, r4, #1 + @ write basic exception frame stmdb r2!, {r1, r3-r5} ldmia sp, {r1, r3-r5}