From patchwork Sat May 3 17:04:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 4106251 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9ECF09F1E1 for ; Sat, 3 May 2014 17:08:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C095C20295 for ; Sat, 3 May 2014 17:08:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DF5BA2026C for ; Sat, 3 May 2014 17:08:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgdMy-0005sz-Vc; Sat, 03 May 2014 17:05:00 +0000 Received: from mail-lb0-f180.google.com ([209.85.217.180]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgdMv-0005s7-WE for linux-arm-kernel@lists.infradead.org; Sat, 03 May 2014 17:04:58 +0000 Received: by mail-lb0-f180.google.com with SMTP id w7so4203233lbi.11 for ; Sat, 03 May 2014 10:04:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:to:subject:cc:from:organization:date :mime-version:content-type:content-transfer-encoding:message-id; bh=2qMlV7esAX/4bfg7hl/CRE77K/WNuMUSin3ydsP7qtw=; b=BXmhrigas1y3n0lF+rOAXEBMYjfDIJOWxMa21Lqb1cRCyY0FCB5USRZpDX/rmK3vP5 PRc8wgeh5a5Cs9xqeSwryDypx/mbulKRIf3C2kz1LLTZWcfaiNlUvF5i6o0LqtqOjHCg J5+YFrXIVo0JkR0wAsNU9Smmyt2EK9axWnYPEquP12Cdl0qDvMThbuZCQPqbC0WaDD7S 0Q9mlHafntc0q1bEk1X9v6aFcCNyfl6K/GLxt824pFqsLQnG0/0TcIYAX0jbPN7bHV+h bDYZ0F0QBvBOFrBRqfySSajUohxVkF1oYsKZy5KONqI3i7Bq/l6owiC3xgScMLBKPQub rppg== X-Gm-Message-State: ALoCoQlFtn2/I6cP1czITnmW3n1bumtcYRNUtYEksMTBUL0CTll94qQ6f+wQJW6TKx3XioCKwZS7 X-Received: by 10.112.146.234 with SMTP id tf10mr17504609lbb.1.1399136673056; Sat, 03 May 2014 10:04:33 -0700 (PDT) Received: from wasted.cogentembedded.com (ppp83-237-59-135.pppoe.mtu-net.ru. [83.237.59.135]) by mx.google.com with ESMTPSA id jh4sm3023124lbb.26.2014.05.03.10.04.31 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 03 May 2014 10:04:32 -0700 (PDT) To: horms@verge.net.au, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH] ARM: shmobile: henninger: add SDHI0/2 DT support From: Sergei Shtylyov Organization: Cogent Embedded Date: Sat, 3 May 2014 21:04:34 +0400 MIME-Version: 1.0 Message-Id: <201405032104.35276.sergei.shtylyov@cogentembedded.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140503_100458_218887_779237D4 X-CRM114-Status: UNSURE ( 9.65 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: mark.rutland@arm.com, linux@arm.linux.org.uk, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, magnus.damm@gmail.com, robh+dt@kernel.org, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the Henninger board dependent part of the SDHI0/2 device nodes along with the necessary voltage regulators (note that the Vcc regulators are dummy -- they are required but don't actually exist on the board). Also, GPIOs have to be used for the CD and WP signals due to the SDHI driver constraints... Signed-off-by: Sergei Shtylyov --- This patch is against 'renesas-devel-v3.15-rc3-20140502' tag of Simon Horman's 'renesas.git' repo. arch/arm/boot/dts/r8a7791-henninger.dts | 76 ++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7791-henninger.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7791-henninger.dts +++ renesas/arch/arm/boot/dts/r8a7791-henninger.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "r8a7791.dtsi" +#include / { model = "Henninger"; @@ -33,6 +34,50 @@ device_type = "memory"; reg = <2 0x00000000 0 0x40000000>; }; + + vcc_sdhi0: regulator@0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi0: regulator@1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi2: regulator@2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi2: regulator@3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -54,6 +99,16 @@ renesas,groups = "intc_irq0"; renesas,function = "intc"; }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; + renesas,function = "sdhi0"; + }; + + sdhi2_pins: sd2 { + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; + renesas,function = "sdhi2"; + }; }; &scif0 { @@ -82,3 +137,24 @@ &sata0 { status = "okay"; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + status = "okay"; +};