From patchwork Tue May 27 23:49:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zi Shen Lim X-Patchwork-Id: 4251961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2F9549F1E7 for ; Tue, 27 May 2014 23:52:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 46C72201FB for ; Tue, 27 May 2014 23:52:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7152F2018B for ; Tue, 27 May 2014 23:52:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WpR7s-00053D-O5; Tue, 27 May 2014 23:49:48 +0000 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WpR7q-000505-Lh for linux-arm-kernel@lists.infradead.org; Tue, 27 May 2014 23:49:47 +0000 X-IronPort-AV: E=Sophos;i="4.98,923,1392192000"; d="scan'208";a="31506746" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 27 May 2014 16:50:49 -0700 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Tue, 27 May 2014 16:49:24 -0700 Received: from mail-sj1-12.sj.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Tue, 27 May 2014 16:49:23 -0700 Received: from lc-sj1-5012.broadcom.com (lc-sj1-5012.sj.broadcom.com [10.66.65.230]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 4F47B27A82; Tue, 27 May 2014 16:49:24 -0700 (PDT) Received: by lc-sj1-5012.broadcom.com (Postfix, from userid 28931) id 3D054E01E65; Tue, 27 May 2014 16:49:24 -0700 (PDT) Date: Tue, 27 May 2014 16:49:24 -0700 From: Zi Shen Lim To: Lorenzo Pieralisi , Mark Brown Subject: Re: [PATCH 4/6] arm64: topology: add MPIDR-based detection Message-ID: <20140527234924.GA2691@lc-sj1-5012.sj.broadcom.com> References: <1399063112-16917-1-git-send-email-broonie@kernel.org> <1399063112-16917-5-git-send-email-broonie@kernel.org> <53763DFC.8070309@arm.com> <20140516183915.GP22111@sirena.org.uk> <5379D594.2000200@arm.com> <20140519105405.GC5935@e102568-lin.cambridge.arm.com> <20140519123314.GU12304@sirena.org.uk> <20140519141323.GA2917@e102568-lin.cambridge.arm.com> <20140519161217.GX12304@sirena.org.uk> <20140519171511.GA5240@e102568-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140519171511.GA5240@e102568-lin.cambridge.arm.com> User-Agent: Mutt/1.4.2.2i X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140527_164946_746382_2E6F2422 X-CRM114-Status: GOOD ( 15.14 ) X-Spam-Score: -3.0 (---) Cc: Mark Rutland , "linaro-kernel@lists.linaro.org" , Catalin Marinas , Will Deacon , Sudeep Holla , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, May 19, 2014 at 06:15:11PM +0100, Lorenzo Pieralisi wrote: [...] > > Hashing compresses the cluster index, but that index is not representative > of HW anyway. If you go for simple shifting we might end up with huge cluster > ids, which is fine but a bit weird. > > So either (1) you use three affinity levels or (2) the simplest way to combine > the affinity levels. > Sorry for jumping in late. The original patch packs the cluster_id, in hope of providing linear mapping when the affinity tree is balanced. I'm fine with the simplest way of shifting/oring, if that's the preferred method :) The patch below applies on top of the series Mark sent out. 1. Dropped mpidr_hash-related bits, in favor of simpler shift/or using MPIDR. 2. Also addressed Lorenzo's comment about redundant cluster_id==-1 check. Mark, can you please apply/squash this patch? Thanks, z diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index b3b3287..7639e8b 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -32,9 +32,6 @@ #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK) -#define MPIDR_AFF_MASK(level) \ - ((u64)MPIDR_LEVEL_MASK << MPIDR_LEVEL_SHIFT(level)) - #define read_cpuid(reg) ({ \ u64 __val; \ asm("mrs %0, " #reg : "=r" (__val)); \ diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index f7f3478..26fc5b0 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -22,7 +22,6 @@ #include #include -#include #include /* @@ -364,12 +363,6 @@ static void update_siblings_masks(unsigned int cpuid) struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; int cpu; - if (cpuid_topo->cluster_id == -1) { - /* No topology information for this cpu ?! */ - pr_err("CPU%u: No topology information configured\n", cpuid); - return; - } - /* update core and thread sibling masks */ for_each_possible_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; @@ -410,19 +403,15 @@ void store_cpu_topology(unsigned int cpuid) /* Multiprocessor system : Multi-threads per core */ cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); - cpuid_topo->cluster_id = - ((mpidr & MPIDR_AFF_MASK(2)) >> mpidr_hash.shift_aff[2] | - (mpidr & MPIDR_AFF_MASK(3)) >> mpidr_hash.shift_aff[3]) - >> mpidr_hash.shift_aff[1] >> mpidr_hash.shift_aff[0]; + cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) | + MPIDR_AFFINITY_LEVEL(mpidr, 3) << 8; } else { /* Multiprocessor system : Single-thread per core */ cpuid_topo->thread_id = -1; cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); - cpuid_topo->cluster_id = - ((mpidr & MPIDR_AFF_MASK(1)) >> mpidr_hash.shift_aff[1] | - (mpidr & MPIDR_AFF_MASK(2)) >> mpidr_hash.shift_aff[2] | - (mpidr & MPIDR_AFF_MASK(3)) >> mpidr_hash.shift_aff[3]) - >> mpidr_hash.shift_aff[0]; + cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) | + MPIDR_AFFINITY_LEVEL(mpidr, 2) << 8 | + MPIDR_AFFINITY_LEVEL(mpidr, 3) << 16; } pr_debug("CPU%u: cluster %d core %d thread %d mpidr %llx\n",