From patchwork Tue Jul 1 14:34:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 4459691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 08CF89F358 for ; Tue, 1 Jul 2014 14:59:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1F103203DA for ; Tue, 1 Jul 2014 14:59:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3E58F2039C for ; Tue, 1 Jul 2014 14:59:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X1zV9-00068s-S4; Tue, 01 Jul 2014 14:57:43 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X1zV2-0005uc-2S for linux-arm-kernel@lists.infradead.org; Tue, 01 Jul 2014 14:57:36 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id C9301119C; Tue, 1 Jul 2014 16:57:21 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 399352AE6; Tue, 1 Jul 2014 16:34:37 +0200 (CEST) Date: Tue, 1 Jul 2014 16:34:28 +0200 From: Thomas Petazzoni To: Gregory CLEMENT Subject: Re: [PATCH 02/16] ARM: mvebu: Add a common function for the boot address work around Message-ID: <20140701163428.23408c9d@free-electrons.com> In-Reply-To: <1403875377-940-3-git-send-email-gregory.clement@free-electrons.com> References: <1403875377-940-1-git-send-email-gregory.clement@free-electrons.com> <1403875377-940-3-git-send-email-gregory.clement@free-electrons.com> Organization: Free Electrons X-Mailer: Claws Mail 3.10.1 (GTK+ 2.24.23; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140701_075736_443000_4AB0F38A X-CRM114-Status: GOOD ( 18.17 ) X-Spam-Score: 1.0 (+) Cc: Lior Amsalem , Andrew Lunn , Jason Cooper , Tawfik Bayouk , linux-pm@vger.kernel.org, Daniel Lezcano , "Rafael J. Wysocki" , Nadav Haklai , Ezequiel Garcia , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Dear Gregory CLEMENT, On Fri, 27 Jun 2014 15:22:43 +0200, Gregory CLEMENT wrote: > +extern unsigned char mvebu_boot_wa_start; > +extern unsigned char mvebu_boot_wa_end; > + > +void mvebu_boot_addr_wa(int crypto_eng_id, u32 resume_addr_reg) > +{ > + void __iomem *sram_virt_base; > + u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start; > + > + mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE); > + mvebu_mbus_add_window_by_id(crypto_eng_id, CRYPT0_ENG_ATTR, > + SRAM_PHYS_BASE, SZ_64K); > + sram_virt_base = ioremap(SRAM_PHYS_BASE, SZ_64K); > + > + > + memcpy(sram_virt_base, &mvebu_boot_wa_start, code_len); > + /* > + * The last word of the code copied in SRAM must contain the > + * physical base address of the PMSU register > + */ > + *(unsigned long *)(sram_virt_base + code_len - 4) = resume_addr_reg; Contrary to what I said, use __raw_writel() and not writel() here, to keep the native endianness of the system when writing the value: __raw_writel() mentioned before. However, the second ldr r0, [r0] reads the value in the Resume Address register, which is written in little-endian by the writel() call in mvebu_pmsu_set_cpu_boot_addr(). Could you include this in your next iteration of the patches? Thanks, Thomas diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 9c56f8c..2b37e01 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -135,9 +135,11 @@ void mvebu_boot_addr_wa(int crypto_eng_id, u32 resume_addr_reg) memcpy(sram_virt_base, &mvebu_boot_wa_start, code_len); /* * The last word of the code copied in SRAM must contain the - * physical base address of the PMSU register + * physical base address of the PMSU register. We + * intentionally store this address in the native endianness + * of the system. */ - *(unsigned long *)(sram_virt_base + code_len - 4) = resume_addr_reg; + __raw_writel(resume_addr_reg, sram_virt_base + code_len - 4); } > +.global mvebu_boot_wa_start > +.global mvebu_boot_wa_end > + > +/* The following code will be executed from SRAM */ > +ENTRY(mvebu_boot_wa_start) > +mvebu_boot_wa_start: > +/* use physical address of the boot address register register */ > + adr r0, 1f > + ldr r0, [r0] > + ldr r0, [r0] > + mov pc, r0 > +/* > + * the last word of this piece of code will be filled by the physical > + * address of the boot address register just after being copied in SRAM > + */ > +1: > + .long . > +mvebu_boot_wa_end: > +ENDPROC(mvebu_boot_wa_end) And this needs to be changed a bit to work properly in a big-endian configuration: diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S index 15b823d..2f8b021 100644 --- a/arch/arm/mach-mvebu/pmsu_ll.S +++ b/arch/arm/mach-mvebu/pmsu_ll.S @@ -43,11 +43,14 @@ ENDPROC(armada_38x_cpu_resume) /* The following code will be executed from SRAM */ ENTRY(mvebu_boot_wa_start) mvebu_boot_wa_start: -/* use physical address of the boot address register register */ +ARM_BE8(setend be ) @ go BE8 if entered LE adr r0, 1f - ldr r0, [r0] - ldr r0, [r0] - mov pc, r0 + ldr r0, [r0] @ load the address of the + @ resume register + ldr r0, [r0] @ load the value in the + @ resume register +ARM_BE8(rev r0, r0) @ the value is stored LE + mov pc, r0 @ jump to this value Note that the first ldr r0, [r0] does not need a rev r0, r0 because the value is stored in the native endianness of the system thanks to the