From patchwork Tue Dec 16 20:38:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 5503951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AC18EBEEA8 for ; Tue, 16 Dec 2014 23:02:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C39F520A14 for ; Tue, 16 Dec 2014 23:02:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B13EA209DC for ; Tue, 16 Dec 2014 23:02:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y116D-0008MJ-Pd; Tue, 16 Dec 2014 23:00:13 +0000 Received: from utopia.booyaka.com ([74.50.51.50]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y115d-0006xZ-Fg for linux-arm-kernel@lists.infradead.org; Tue, 16 Dec 2014 22:59:38 +0000 Received: (qmail 11691 invoked by uid 1019); 16 Dec 2014 22:58:51 -0000 MBOX-Line: From paul@pwsan.com Tue Dec 16 12:38:29 2014 Subject: [PATCH 3/4] clk: tegra: Update binding doc for Tegra132 To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org From: Paul Walmsley Date: Tue, 16 Dec 2014 12:38:29 -0800 Message-ID: <20141216203828.22980.14684.stgit@chromeos-P9X79> In-Reply-To: <20141216203813.22980.2301.stgit@chromeos-P9X79> References: <20141216203813.22980.2301.stgit@chromeos-P9X79> User-Agent: StGit/0.15 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141216_145937_677505_200D59F2 X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: Mark Rutland , Alexandre Courbot , Paul Walmsley , Pawel Moll , Stephen Warren , Peter De Schrijver , Ian Campbell , Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Peter De Schrijver Tegra132 has almost the same clock structure than Tegra124. This patch documents the missing clock IDs. Signed-off-by: Peter De Schrijver [paul@pwsan.com: updated binding documentation to reflect the recent split of Tegra124 clock IDs into a Tegra124/132-common file and a Tegra124-specific file] Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala --- .../bindings/clock/nvidia,tegra124-car.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt index ded5d62..c6620bc 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt @@ -1,4 +1,4 @@ -NVIDIA Tegra124 Clock And Reset Controller +NVIDIA Tegra124 and Tegra132 Clock And Reset Controller This binding uses the common clock binding: Documentation/devicetree/bindings/clock/clock-bindings.txt @@ -7,14 +7,16 @@ The CAR (Clock And Reset) Controller on Tegra is the HW module responsible for muxing and gating Tegra's clocks, and setting their rates. Required properties : -- compatible : Should be "nvidia,tegra124-car" +- compatible : Should be "nvidia,tegra124-car" or "nvidia,tegra132-car" - reg : Should contain CAR registers location and length - clocks : Should contain phandle and clock specifiers for two clocks: the 32 KHz "32k_in", and the board-specific oscillator "osc". - #clock-cells : Should be 1. In clock consumers, this cell represents the clock ID exposed by the - CAR. The assignments may be found in header file - . + CAR. The assignments may be found in the header files + (which covers IDs common + to Tegra124 and Tegra132) and + (for Tegra124-specific clocks). - #reset-cells : Should be 1. In clock consumers, this cell represents the bit number in the CAR's array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.