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[24/24] Documentation: DT bindings: add nvidia, denver compatible string

Message ID 20150128234938.20644.69989.stgit@dusk.lan (mailing list archive)
State New, archived
Headers show

Commit Message

Paul Walmsley Jan. 28, 2015, 11:49 p.m. UTC
Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
binding documentation file.  The primary objective here is to keep
checkpatch.pl from warning when the compatible string is used in an
SoC DT file, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2


Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Rohit Vaswani <rvaswani@codeaurora.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Marc Carino <marc.ceeeee@gmail.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
 Documentation/devicetree/bindings/arm/cpus.txt |    1 +
 1 file changed, 1 insertion(+)

Comments

Rob Herring Jan. 29, 2015, 2:36 p.m. UTC | #1
On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
>
> Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
> binding documentation file.  The primary objective here is to keep
> checkpatch.pl from warning when the compatible string is used in an
> SoC DT file, per:
>
> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Olof Johansson <olof@lixom.net>
> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> Cc: Rohit Vaswani <rvaswani@codeaurora.org>
> Cc: Paul Walmsley <pwalmsley@nvidia.com>
> Cc: Marc Carino <marc.ceeeee@gmail.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> ---
>  Documentation/devicetree/bindings/arm/cpus.txt |    1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index b2aacbe16ed9..4ea31f0b7764 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
>                             "marvell,pj4a"
>                             "marvell,pj4b"
>                             "marvell,sheeva-v5"
> +                           "nvidia,denver" (not yet matched in the code)

There's not variations or versions of Denver cores or plans to change
from the codename?

Rob
Paul Walmsley Jan. 30, 2015, 7:33 p.m. UTC | #2
Hi Rob

On Thu, 29 Jan 2015, Rob Herring wrote:

> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> >
> > Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
> > binding documentation file.  The primary objective here is to keep
> > checkpatch.pl from warning when the compatible string is used in an
> > SoC DT file, per:
> >
> > http://marc.info/?l=linux-tegra&m=142201349727836&w=2
> >
> >
> > Signed-off-by: Paul Walmsley <paul@pwsan.com>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Pawel Moll <pawel.moll@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> > Cc: Kumar Gala <galak@codeaurora.org>
> > Cc: Heiko Stuebner <heiko@sntech.de>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Olof Johansson <olof@lixom.net>
> > Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Cc: Rohit Vaswani <rvaswani@codeaurora.org>
> > Cc: Paul Walmsley <pwalmsley@nvidia.com>
> > Cc: Marc Carino <marc.ceeeee@gmail.com>
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-arm-kernel@lists.infradead.org
> > ---
> >  Documentation/devicetree/bindings/arm/cpus.txt |    1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> > index b2aacbe16ed9..4ea31f0b7764 100644
> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> > @@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
> >                             "marvell,pj4a"
> >                             "marvell,pj4b"
> >                             "marvell,sheeva-v5"
> > +                           "nvidia,denver" (not yet matched in the code)
> 
> There's not variations or versions of Denver cores or plans to change
> from the codename?

Hard to say what the future will bring.  I'll change it to 
"nvidia,tegra132-denver".


- Paul
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index b2aacbe16ed9..4ea31f0b7764 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -175,6 +175,7 @@  nodes to be present and contain the properties described below.
 			    "marvell,pj4a"
 			    "marvell,pj4b"
 			    "marvell,sheeva-v5"
+			    "nvidia,denver" (not yet matched in the code)
 			    "qcom,krait"
 			    "qcom,scorpion"
 	- enable-method