From patchwork Tue Mar 17 08:32:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 6027901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 836109F2A9 for ; Tue, 17 Mar 2015 08:44:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B150120454 for ; Tue, 17 Mar 2015 08:44:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5FC92014A for ; Tue, 17 Mar 2015 08:44:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXn54-0003Nl-MJ; Tue, 17 Mar 2015 08:42:30 +0000 Received: from utopia.booyaka.com ([74.50.51.50]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXn4c-00035i-PD for linux-arm-kernel@lists.infradead.org; Tue, 17 Mar 2015 08:42:04 +0000 Received: (qmail 15778 invoked by uid 1019); 17 Mar 2015 08:41:40 -0000 MBOX-Line: From nobody Tue Mar 17 01:32:21 2015 Subject: [PATCHv2 3/3] Documentation: DT bindings: Tegra AHB: note base address change From: Paul Walmsley To: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Date: Tue, 17 Mar 2015 01:32:21 -0700 Message-ID: <20150317083221.32662.96822.stgit@baseline> In-Reply-To: <20150317083221.32662.14647.stgit@baseline> References: <20150317083221.32662.14647.stgit@baseline> User-Agent: StGit/0.17.1-4-g4a0c1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150317_014203_001769_B4D630EF X-CRM114-Status: UNSURE ( 7.37 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Ian Campbell , Stephen Warren , linux-kernel@vger.kernel.org, Eduardo Valentin , devicetree@vger.kernel.org, Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , Hiroshi DOYU X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For Tegra132 and later chips, we can now use the correct hardware base address for the Tegra AHB IP block in the DT data. Update the DT binding documentation to reflect this change. Signed-off-by: Paul Walmsley Cc: Paul Walmsley Cc: Alexandre Courbot Cc: Eduardo Valentin Cc: Hiroshi DOYU Cc: Ian Campbell Cc: Kumar Gala Cc: Mark Rutland Cc: Paul Walmsley Cc: Pawel Moll Cc: Rob Herring Cc: Stephen Warren Cc: Thierry Reding Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/arm/tegra/nvidia,tegra20-ahb.txt | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt index 067c979..7692b4c 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt @@ -2,10 +2,15 @@ NVIDIA Tegra AHB Required properties: - compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For - Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain - '"nvidia,-ahb", "nvidia,tegra30-ahb"' where is tegra124, - tegra132, or tegra210. -- reg : Should contain 1 register ranges(address and length) + Tegra30, must contain "nvidia,tegra30-ahb". For Tegra114 and Tegra124, must + contain '"nvidia,-ahb", "nvidia,tegra30-ahb"' where is tegra114 + or tegra124. For Tegra132, the compatible string must contain + "nvidia,tegra132-ahb". + +- reg : Should contain 1 register ranges(address and length). On Tegra20, + Tegra30, Tegra114, and Tegra124 chips, the low byte of the physical base + address of the IP block must end in 0x04. On DT files for later chips, the + actual hardware base address of the IP block should be used. Example: ahb: ahb@6000c004 {