From patchwork Tue Apr 28 14:17:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Fuzzey X-Patchwork-Id: 6289751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 48E669F373 for ; Tue, 28 Apr 2015 14:21:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E82220383 for ; Tue, 28 Apr 2015 14:21:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2AFA320374 for ; Tue, 28 Apr 2015 14:21:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yn6LD-0004qa-5W; Tue, 28 Apr 2015 14:18:27 +0000 Received: from ip83.parkeon.com ([213.152.31.83] helo=mta2.parkeon.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yn6Kp-0004hQ-NL for linux-arm-kernel@lists.infradead.org; Tue, 28 Apr 2015 14:18:05 +0000 Received: from time001.besancon.parkeon.com ([10.32.16.23] helo=mail.besancon.parkeon.com) by mta2.parkeon.com with esmtp (Exim 4.82) (envelope-from ) id 1Yn6KO-0004Vb-6x; Tue, 28 Apr 2015 16:17:36 +0200 Received: from [10.32.51.184] (port=54648 helo=[127.0.0.1]) by mail.besancon.parkeon.com with esmtp (Exim 4.71) (envelope-from ) id 1Yn6KQ-0007e4-Fm; Tue, 28 Apr 2015 16:17:38 +0200 Subject: [PATCH 1/2] Regulator: mc34708: Add DT binding documentation To: Mark Brown , Liam Girdwood , Rob Herring From: Martin Fuzzey Date: Tue, 28 Apr 2015 16:17:38 +0200 Message-ID: <20150428141738.16243.18377.stgit@localhost> In-Reply-To: <20150428141736.16243.57292.stgit@localhost> References: <20150428141736.16243.57292.stgit@localhost> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Spam-Score: -2.0 (--) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150428_071803_982620_58AB9638 X-CRM114-Status: UNSURE ( 5.39 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Martin Fuzzey --- .../bindings/regulator/mc34708-regulator.txt | 198 ++++++++++++++++++++ 1 file changed, 198 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mc34708-regulator.txt diff --git a/Documentation/devicetree/bindings/regulator/mc34708-regulator.txt b/Documentation/devicetree/bindings/regulator/mc34708-regulator.txt new file mode 100644 index 0000000..35efae0 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mc34708-regulator.txt @@ -0,0 +1,198 @@ +Regulators included in the Freescale MC34708 PMIC + +Required properties: +- compatible: "fsl,mc34708" +- reg: I2C slave address + + +Regulators subnode: +------------------- +This node contains children following the standard regulator binding format +described in Documentation/devicetree/bindings/regulator/regulator.txt + +The allowed node names are: + Switchers: + sw1, sw2, sw3, sw4a, sw4b, sw5, swbst + LDOs: + vpll, vrefddr, vusb, vusb2, vdac, vgen1, vgen2 + +The mode values are: + Switchers: + 1 : Pulse Frequency Modulation (PFM) [for low loads] + 2 : Auto + 3 : Pulse Width Modulation (PWM) [for high loads] + LDOs: + 1 : Low power + 2 : Normal + +Optional properties: +The input supply of regulators are the optional properties on the +regulator node. + +- vinsw1-supply : phandle to input supply for sw1 regulator +- vinsw2-supply : phandle to input supply for sw2 regulator +- vinsw3-supply : phandle to input supply for sw3 regulator +- vinsw4a-supply : phandle to input supply for sw4a regulator +- vinsw4b-supply : phandle to input supply for sw4b regulator +- vinsw5-supply : phandle to input supply for sw5 regulator +- vinswbst-supply : phandle to input supply for swbst regulator +- vinrefddr-supply : phandle to input supply for vrefddr regulator (/2) + + +Example: +&i2c3 { + pmic: mc34708@08 { + compatible = "fsl,mc34708"; + reg = <0x08>; + regulators { +#define PMIC_REGMODE_SW_PFM 1 +#define PMIC_REGMODE_SW_AUTO 2 +#define PMIC_REGMODE_SW_PWM 3 +#define PMIC_REGMODE_LDO_LP 1 +#define PMIC_REGMODE_LDO_NORMAL 2 + + vinrefddr-supply = <&pmic_sw4a_reg>; + pmic_sw1_reg: sw1 { + /* CPU Core */ + regulator-name = "SW1"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <1437500>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <850000>; + regulator-mode = ; + }; + }; + + pmic_sw2_reg: sw2 { + /* SOC Periperals */ + regulator-name = "SW2"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <1437500>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + regulator-mode = ; + }; + }; + + pmic_sw3_reg: sw3 { + regulator-name = "SW3"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <1425000>; + }; + + pmic_sw4a_reg: sw4a { + /* DDR Ram */ + regulator-name = "SW4A"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; + }; + + pmic_sw5_reg: sw5 { + /* 1v8 power */ + regulator-name = "SW5"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; + }; + + pmic_swbst_reg: swbst { + regulator-name = "SWBST"; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pmic_vpll_reg: vpll { + regulator-name = "VPLL"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + pmic_vrefddr_reg: vrefddr { + regulator-name = "VREFDDR"; + regulator-boot-on; + regulator-always-on; + }; + + pmic_vusb_reg: vusb { + regulator-name = "VUSB"; + regulator-boot-on; + regulator-always-on; + }; + + pmic_vusb2_reg: vusb2 { + regulator-name = "VUSB2"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pmic_vdac_reg: vdac { + regulator-name = "VDAC"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2775000>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; + }; + + pmic_vgen1_reg: vgen1 { + regulator-name = "VGEN1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1550000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pmic_vgen2_reg: vgen2 { + regulator-name = "VGEN2"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-initial-mode = ; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; + }; + }; + }; +};