From patchwork Thu May 7 12:59:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 6357721 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9B1B39F32B for ; Thu, 7 May 2015 13:02:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 058C42038C for ; Thu, 7 May 2015 13:02:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B87120386 for ; Thu, 7 May 2015 13:02:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YqLPR-0000VL-5x; Thu, 07 May 2015 13:00:13 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YqLPL-0007vd-7J for linux-arm-kernel@lists.infradead.org; Thu, 07 May 2015 13:00:07 +0000 Received: by pabtp1 with SMTP id tp1so39674087pab.2 for ; Thu, 07 May 2015 05:59:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=EGcShN++KqZcsxnXpcK7lzYTyLuJfBwlgBMP2kNFapg=; b=cXS9CKlgWyeEigcovrzHN4n1HMaDqdjCt/k5VOD/uZ4d734oql/7OOOUwrLBW+ONBm kCwRHPZiKxADhzPTRHmeKUD29csyGm7RjgPAoZkUpFGuFoNZDmePja9a5VYoxcwVLC9V HEVs8ZGG2M/c0EDjOH5dBsQacR00s7JPIdBADfv7hzY1TNIwMjUpZycWOdbhKTtfoEQ2 9Jj4PRoVTvJJYDY14LCa7dNN/RkWf21rE5ZAlNMKVuFveK7xFTtT/ilIZKkyCCfCeJwm WbsqKm0qs1S6NK+XN22/o5vLebHMht5iVE5zWJDNC3eFAwqETA8syEMnUSQUhrvCafOY mIFQ== X-Gm-Message-State: ALoCoQm3rIGLLgUp038PL6LoZchHcqXaeHVuEROzj2PUHwKpXFPZWycoMIc2YJWYs8vDcZLM5poc X-Received: by 10.68.139.131 with SMTP id qy3mr6841903pbb.146.1431003585745; Thu, 07 May 2015 05:59:45 -0700 (PDT) Received: from dragon ([107.6.117.179]) by mx.google.com with ESMTPSA id to6sm2159108pbc.19.2015.05.07.05.59.42 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 07 May 2015 05:59:45 -0700 (PDT) Date: Thu, 7 May 2015 20:59:03 +0800 From: Shawn Guo To: Shenwei Wang Subject: Re: [PATCH 1/1] ARM: imx: Correct the comments in time.c Message-ID: <20150507125858.GH3162@dragon> References: <1430343627-60688-1-git-send-email-shenwei.wang@freescale.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1430343627-60688-1-git-send-email-shenwei.wang@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150507_060007_322648_206FB74D X-CRM114-Status: GOOD ( 17.38 ) X-Spam-Score: -0.7 (/) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Apr 29, 2015 at 04:40:27PM -0500, Shenwei Wang wrote: > The comments were corrected as the following to reflect > the real situation of Freescale MXC timer IP block. > There are totally 4 version of the timer on Freescale i.MX SoCs. > > Signed-off-by: Shenwei Wang > --- > arch/arm/mach-imx/time.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c > index acb1ff5..b1698e1 100644 > --- a/arch/arm/mach-imx/time.c > +++ b/arch/arm/mach-imx/time.c > @@ -38,9 +38,11 @@ > #include "hardware.h" > > /* > - * There are 2 versions of the timer hardware on Freescale MXC hardware. > - * Version 1: MX1/MXL, MX21, MX27. > - * Version 2: MX25, MX31, MX35, MX37, MX51 > + * There are 4 versions of the timer hardware on Freescale MXC hardware. > + * Version 0: MX1/MXL > + * Version 1: MX21, MX27. > + * Version 2: MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0) > + * Version 3: MX6DL, MX6SX, MX6Q(rev1.1+) This is the problem with version numbers. Version numbers defined by software are too arbitrary and could conflict with the ones defined by IP design (i.e. IPUv3) some day. Just for example, if some day GPTv2 IP comes with some significant design changes, "v2" will becomes a source of confusion between software and hardware. It's even worse if we already defined fsl,gpt-v2 as the device tree compatible. That's why we can only use the version number defined by hardware in device tree binding. If no hardware version is given, the best bet would be use SoC name in the bindings to specify the particular programming model of the IP block. I applied patch to drop the version numbers as below. Shawn diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index acb1ff577cda..ab5ee1c445f3 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -38,9 +38,11 @@ #include "hardware.h" /* - * There are 2 versions of the timer hardware on Freescale MXC hardware. - * Version 1: MX1/MXL, MX21, MX27. - * Version 2: MX25, MX31, MX35, MX37, MX51 + * There are 4 versions of the timer hardware on Freescale MXC hardware. + * - MX1/MXL + * - MX21, MX27. + * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0) + * - MX6DL, MX6SX, MX6Q(rev1.1+) */ /* defines common for all i.MX */