From patchwork Mon May 11 20:16:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Welling X-Patchwork-Id: 6383931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1EB439F32E for ; Mon, 11 May 2015 20:19:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F1A0920426 for ; Mon, 11 May 2015 20:19:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E076D200FF for ; Mon, 11 May 2015 20:19:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yru8O-0001pJ-Q1; Mon, 11 May 2015 20:17:04 +0000 Received: from mail-ig0-x22d.google.com ([2607:f8b0:4001:c05::22d]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yru8J-0001lT-NU for linux-arm-kernel@lists.infradead.org; Mon, 11 May 2015 20:17:00 +0000 Received: by igbyr2 with SMTP id yr2so81879944igb.0 for ; Mon, 11 May 2015 13:16:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=1A5/gJI5eszdQUKulfDsCZLw2GF/8vXX+JNPtoJtl9I=; b=zU76bQaXmi2BywLPWGohaJc3ATYRyCoLXpi4+RoiFJBjqNfUNf4jJjAIsQ+DgMNrrC xT9sF+YNGaE+yMWz708LpHmxawKhB7A0o6D7TIupAHghBI3Mi6k3saOrRx2AYSiFukhj 2YfvzVnBq/5d4QZpeLSjX25fBFRZm9ADGKiSDn4HAgWSvrDob2krWe72IeQiZY1i0qPz tWIzp9O1ShO+aVRVIW6qwVlN52Iyq0CdgY+Y9t+Cwmv85WoI94uN4QjWnay9HW4b/30L DUyI0c9/1J6ZRtCpA9LQZTspPa3Hq/C+mKE/ckkYitFa549ZXGxh4CO8HdlgA2SG0A5d qinw== X-Received: by 10.42.79.147 with SMTP id r19mr12781782ick.5.1431375398839; Mon, 11 May 2015 13:16:38 -0700 (PDT) Received: from deathray (173-22-240-38.client.mchsi.com. [173.22.240.38]) by mx.google.com with ESMTPSA id b8sm10403919ioe.23.2015.05.11.13.16.37 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 11 May 2015 13:16:38 -0700 (PDT) Date: Mon, 11 May 2015 15:16:33 -0500 From: Michael Welling To: Nishanth Menon Subject: Re: next-20150511 / omap2-mcspi: regression for sdp4430 boot Message-ID: <20150511201633.GA31117@deathray> References: <5550DDCB.8010303@ti.com> <20150511170742.GA6616@deathray> <5550F47C.1030902@ti.com> <20150511183032.GA8085@deathray> <5550FC38.6020801@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5550FC38.6020801@ti.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150511_131659_809416_D7C37D54 X-CRM114-Status: GOOD ( 33.07 ) X-Spam-Score: -0.4 (/) Cc: linux-omap , Mark Brown , linux-next , "linux-arm-kernel@lists.infradead.org" , linux-spi@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, May 11, 2015 at 02:00:08PM -0500, Nishanth Menon wrote: > On 05/11/2015 01:30 PM, Michael Welling wrote: > > On Mon, May 11, 2015 at 01:27:08PM -0500, Nishanth Menon wrote: > >> On 05/11/2015 12:07 PM, Michael Welling wrote: > >>> On Mon, May 11, 2015 at 11:50:19AM -0500, Nishanth Menon wrote: > >>>> Hi, > >>>> > >>>> SDP4430 uses a SPI based network chip ks8851. > >>>> > >>>> next-20150508: > >>>> https://github.com/nmenon/kernel-test-logs/blob/next-20150508/omap2plus_defconfig/sdp4430.txt > >>>> > >>>> However, next-20150511: > >>>> https://github.com/nmenon/kernel-test-logs/blob/next-20150511/omap2plus_defconfig/sdp4430.txt > >>>> > >>> > >>> I will look into this but it is going to be difficult to debug with access to the hardware. > >>> This is what I get for changing a driver that effects so many SoCs. > >>> > >> > >> Let me know if there is any test patch you'd want me to run. The board > >> is on a remote "board farm" which most of TI folks have access to as > >> well.. So, if you need anything run, just send out a debug patch OR a > >> potential fix and we can help try it out and provide logs back for > >> your debug. > > > > Okay. > > > > It looks like you revert the patches in the wrong order above. > > > > The GPIO patch should apply after the transfer_one patch so it should > > logically be reverted in the reverse order. > > > Apologies on a slow response, was tracking another LPAE regression down. > > I did do that -> but logged it in reverse - unfortunately it seems to > have caused a little more confusion :(. is there something else you'd > like me to do? Okay I have another patch that appears to fix the issue on my board. Please test the attached patch and see if it fixes the issue on your board. If it does, I will send it upstream. > > git log next-20150508..next-20150511 drivers/spi > Tells me: > > commit bc7f9bbc80bcc77745b3f54ec4e7103e3e142bb9 > Author: Michael Welling > Date: Fri May 8 13:31:01 2015 -0500 > > spi: omap2-mcspi: Add gpio_request and init CS > > If GPIO chip select is specified, request the GPIO in the setup > function > and release it in the cleanup function. > > Signed-off-by: Michael Welling > Signed-off-by: Mark Brown > > commit b28cb9414db9f8e42ac18c9e360e4e99cda42489 > Author: Michael Welling > Date: Thu May 7 18:36:53 2015 -0500 > > spi: omap2-mcspi: Switch driver to use transfer_one > > Switches from transfer_one_message to transfer_one to prepare > driver for > use of GPIO chip selects. > > Signed-off-by: Michael Welling > Signed-off-by: Mark Brown > > > > my tested git log looks as follows: (redid it just to be sure): > > a4617b41e04c Revert "spi: omap2-mcspi: Switch driver to use transfer_one" > http://paste.ubuntu.org.cn/2595136 > > b49011271c7f Revert "spi: omap2-mcspi: Add gpio_request and init CS" > http://paste.ubuntu.org.cn/2595142 > > > 012034602bd6 HACK: Makefile: Build a uImage with dtb already appended > f17107cb8886 Add linux-next specific files for 20150511 > > 012034602bd6 commit is > https://github.com/nmenon/linux-2.6-playground/commit/177f5f71b3f2 -> > for legacy platforms needing uImage based booting. > > -- > Regards, > Nishanth Menon GPIO chip select patch series appears to have broken the native chip select support. This patch pulls the manual native chip select toggling out of the transfer_one routine and adds a set_cs routine. Tested natively on AM3354 with SPI serial flash on spi0cs0. Signed-off-by: Michael Welling --- drivers/spi/spi-omap2-mcspi.c | 33 +++++++++++---------------------- 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 90cf7e7..a7d85c5 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -243,17 +243,20 @@ static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable) mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCTRL0); } -static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active) +static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) { u32 l; - l = mcspi_cached_chconf0(spi); - if (cs_active) - l |= OMAP2_MCSPI_CHCONF_FORCE; - else - l &= ~OMAP2_MCSPI_CHCONF_FORCE; + if (spi->controller_state) { + l = mcspi_cached_chconf0(spi); - mcspi_write_chconf0(spi, l); + if (enable) + l &= ~OMAP2_MCSPI_CHCONF_FORCE; + else + l |= OMAP2_MCSPI_CHCONF_FORCE; + + mcspi_write_chconf0(spi, l); + } } static void omap2_mcspi_set_master_mode(struct spi_master *master) @@ -1075,7 +1078,6 @@ static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, struct spi_master *master; struct omap2_mcspi_dma *mcspi_dma; - int cs_active = 0; struct omap2_mcspi_cs *cs; struct omap2_mcspi_device_config *cd; int par_override = 0; @@ -1118,11 +1120,6 @@ static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, mcspi_read_cs_reg(spi, OMAP2_MCSPI_MODULCTRL); } - if (!cs_active) { - omap2_mcspi_force_cs(spi, 1); - cs_active = 1; - } - chconf = mcspi_cached_chconf0(spi); chconf &= ~OMAP2_MCSPI_CHCONF_TRM_MASK; chconf &= ~OMAP2_MCSPI_CHCONF_TURBO; @@ -1169,12 +1166,6 @@ static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, if (t->delay_usecs) udelay(t->delay_usecs); - /* ignore the "leave it on after last xfer" hint */ - if (t->cs_change) { - omap2_mcspi_force_cs(spi, 0); - cs_active = 0; - } - omap2_mcspi_set_enable(spi, 0); if (mcspi->fifo_depth > 0) @@ -1187,9 +1178,6 @@ out: status = omap2_mcspi_setup_transfer(spi, NULL); } - if (cs_active) - omap2_mcspi_force_cs(spi, 0); - if (cd && cd->cs_per_word) { chconf = mcspi->ctx.modulctrl; chconf |= OMAP2_MCSPI_MODULCTRL_SINGLE; @@ -1334,6 +1322,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) master->setup = omap2_mcspi_setup; master->auto_runtime_pm = true; master->transfer_one = omap2_mcspi_transfer_one; + master->set_cs = omap2_mcspi_set_cs; master->cleanup = omap2_mcspi_cleanup; master->dev.of_node = node; master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ; -- 1.7.9.5