From patchwork Tue May 12 03:05:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 6385251 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CB7749F1C2 for ; Tue, 12 May 2015 03:08:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B323E20395 for ; Tue, 12 May 2015 03:08:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 919C120390 for ; Tue, 12 May 2015 03:08:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ys0WX-0005QF-Fp; Tue, 12 May 2015 03:06:25 +0000 Received: from mail-pa0-f48.google.com ([209.85.220.48]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ys0WR-0005HP-I1 for linux-arm-kernel@lists.infradead.org; Tue, 12 May 2015 03:06:20 +0000 Received: by pacyx8 with SMTP id yx8so127891933pac.1 for ; Mon, 11 May 2015 20:05:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=1lDcEkayv6fRWxl48plWLBfzhi73jGSlGH86ooehXXE=; b=C1Gj+PPWGhbph/17tV84ourOQOg3md+7j6RgeaNBjxS2j7nkt2Wi8ZUufmZ/uHdz85 LuGo7yBTojKCHlIjSYBtJOD+PbngqOtMEwP/4VaLR0SmnzG4LIMfjZ56Uz3TOJxWwQs7 zsAqlCHl8pEJFw3dCcxJ+cRuQ7gllY6tDftBRFMg8TXtFHFPkC6GogMogrDjpU6l29S9 UXxLwIGa6R0lAKfFUlN7uJbGFUP6QqKatMKqhrFFxH5GoMaqZvu4Y00iK73z90QXocSG 17QpmsflTrDRADwyNSujopLHrxwbPUWLr4fc+8OIejgfPyyFBccW8+4ZscAIEcLL9ctT hNwQ== X-Gm-Message-State: ALoCoQn9FhpRRjQGsWBenYqR32cofFd6Z6dE6SvSy1GYOXsP8k7Q9vR5TZiKlQLCZdpu9Lej7Nb3 X-Received: by 10.67.10.105 with SMTP id dz9mr24019138pad.12.1431399957836; Mon, 11 May 2015 20:05:57 -0700 (PDT) Received: from leoy-linaro ([180.150.148.224]) by mx.google.com with ESMTPSA id pp6sm14443517pbb.17.2015.05.11.20.05.46 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 11 May 2015 20:05:57 -0700 (PDT) Date: Tue, 12 May 2015 11:05:42 +0800 From: Leo Yan To: Kevin Hilman Subject: Re: [PATCH v5 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Message-ID: <20150512030542.GA5889@leoy-linaro> References: <1431007225-8513-1-git-send-email-bintian.wang@huawei.com> <7ha8xgi10e.fsf@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150511_200619_682353_A4B449E5 X-CRM114-Status: GOOD ( 29.13 ) X-Spam-Score: -0.7 (/) Cc: Mark Rutland , "dan.zhao@hisilicon.com" , "btw@mail.itp.ac.cn" , Catalin Marinas , "wangbinghui@hisilicon.com" , Will Deacon , "huxinwei@huawei.com" , Haojian Zhuang , Haifeng Yan , Rob Herring , Mike Turquette , Pawel Moll , Brent Wang , Xu Wei , Jaehoon Chung , "sledge.yanwei@huawei.com" , XinWei Kong , "heyunlei@huawei.com" , "w.f@huawei.com" , Zhangfei Gao , "z.liuxinliang@huawei.com" , "devicetree@vger.kernel.org" , Bintian Wang , Arnd Bergmann , Ian Campbell , Marc Zyngier , "puck.chen@hisilicon.com" , "xuejiancheng@huawei.com" , Rob Herring , Russell King - ARM Linux , Tyler Baker , "zhenwei.wang@hisilicon.com" , linux-arm-kernel , pebolle@tiscali.nl, Guodong Xu , "victor.lixin@hisilicon.com" , Stephen Boyd , "linux-kernel@vger.kernel.org" , Tomeu Vizoso , Kumar Gala , Olof Johansson , Jorge Ramirez-Ortiz , "xuyiping@hisilicon.com" , "Liguozhu \(Kenneth\)" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP hi Kevin, On Mon, May 11, 2015 at 05:20:54PM -0700, Kevin Hilman wrote: > On Thu, May 7, 2015 at 4:11 PM, Brent Wang wrote: > > Hello Kevin, > > > > 2015-05-08 4:30 GMT+08:00 Kevin Hilman : > >> Bintian Wang writes: > >> > >>> Hi6220 is one mobile solution of Hisilicon, this patchset contains > >>> initial support for Hi6220 SoC and HiKey development board, which > >>> supports octal ARM Cortex A53 cores. Initial support is minimal and > >>> includes just the arch configuration, clock driver, device tree > >>> configuration. > >>> > >>> PSCI is enabled in device tree and there is no problem to boot all the > >>> octal cores, and the CPU hotplug is also working now, you can download > >>> and compile the latest firmware based on the following link to run this > >>> patch set: > >>> https://github.com/96boards/documentation/wiki/UEFI > >> > >> Do you have any tips for booting this using the HiSi bootloader? It > >> seems that I need to add the magic hisi,boardid property for dtbTool to > >> work. Could you share what that magic value is? > > Yes, you need it. > > Hisilicon has many different development boards and those boards have some > > different hardware configuration, so we need different device tree > > files for them. > > the original hisi,boardid is used to distinguish different boards and > > used by the > > bootloader to judge which device tree to use at boot-up. > > > >> and maybe add it to the wiki someplace? > > Maybe add to section "Known Issues" in > > "https://github.com/96boards/documentation/wiki/UEFI" > > is a good choice, I will update this section later. > > You updated the wiki, but you didn't specify what the value should be > for this to work with the old bootloader. > > Can you please give the value of that property? > > Also, have you tested this series with the old bootloader as well? Below are my testing result w/t Bintian's patches and Hisilicon old bootloader: - Need add property "hisi,boardid" into dts; - Need change cpu enable-method from "psci" to "spin-table"; - The bootloader has not initialized register *cntfrq_el0* so will introduce the failure during init arch timer. For init cntfrq_el0, we need fix this issue in Hisilicon's old bootloader, rather than directly add "clock-frequency" for arch timer's node in DTS. i will try to commit one patch for fix this issue for Hisilicon's old bootloader. So i think upper issues mainly are introduced by Hisilicon's old bootloader but not come from Bintian's patches. How about u think for this? Below is my local diff which is used to compatible w/t Hisilicon's old bootloader; Just for your reference. Thanks, Leo Yan ---8<--- diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e36a539..fd1f89e 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -14,6 +14,7 @@ / { model = "HiKey Development Board"; + hisi,boardid = <0 0 4 3>; compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; aliases { diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 229937f..8ade3d9 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -13,11 +13,6 @@ #address-cells = <2>; #size-cells = <2>; - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - cpus { #address-cells = <2>; #size-cells = <0>; @@ -57,56 +52,64 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu1: cpu@1 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu4: cpu@100 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu5: cpu@101 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu6: cpu@102 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; cpu7: cpu@103 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>; - enable-method = "psci"; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x740fff8>; }; }; @@ -129,6 +132,7 @@ , , ; + clock-frequency = <1200000>; }; soc {