From patchwork Thu Jun 18 02:50:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 6632671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 07F249F326 for ; Thu, 18 Jun 2015 03:17:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0846520678 for ; Thu, 18 Jun 2015 03:17:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 093DE20611 for ; Thu, 18 Jun 2015 03:17:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5QIL-00023P-VS; Thu, 18 Jun 2015 03:15:13 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5QII-0001HO-1k for linux-arm-kernel@bombadil.infradead.org; Thu, 18 Jun 2015 03:15:10 +0000 Received: from mail-pa0-f54.google.com ([209.85.220.54]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5Puv-0006qf-Pb for linux-arm-kernel@lists.infradead.org; Thu, 18 Jun 2015 02:51:02 +0000 Received: by paceq1 with SMTP id eq1so25857996pac.3 for ; Wed, 17 Jun 2015 19:50:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=RW2bwZdhAv2nsgT7gv6NyxfUNz3n0Oe+oD5A2lXzlB8=; b=HucUbE0BKBtX1ryqw9FNQCXAND7dup1K0oNJUGQl4aw0+039pKg4aKdIAjxRi+iG5M 9yQaNmn/zOtgUsR4JSIBCqTBIxs4dvf8XP6SBmlkNnJfYZ8TyQRe7mFEYI/yeNoUaggJ x+sOLEn/K270M2vaFOfIlQ+OnF8oj5ve9cYRe3bpDZuawZqOMJoGAIk09Yol3/NypVTE nso9Q2diNTmL7Td/BvqQDqU3Mid7pDQKQ6Qxvbl/PLcGdge/RaQIwdxzcU7E0Ynq/E0x 1mn2asNWJz272Nl/EnV5gRadPz5jGV1S5NTd7d4KMAtl0vCsFaqM0qzblRsp4DsvZSiK W/zA== X-Gm-Message-State: ALoCoQkSPgAUwk0hwjzu7k8gkPYh88rIYuDFtGyEDYPz0Qc7jisHF+OTeDIt5XDtZdKm+gARBMnK X-Received: by 10.70.37.9 with SMTP id u9mr16743408pdj.50.1434595838092; Wed, 17 Jun 2015 19:50:38 -0700 (PDT) Received: from localhost ([122.167.70.98]) by mx.google.com with ESMTPSA id h5sm5470817pat.9.2015.06.17.19.50.36 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 17 Jun 2015 19:50:37 -0700 (PDT) Date: Thu, 18 Jun 2015 08:20:34 +0530 From: Viresh Kumar To: Stephen Boyd Subject: Re: [PATCH V7 2/3] OPP: Allow multiple OPP tables to be passed via DT Message-ID: <20150618025034.GB28820@linux> References: <263c128844f5a3c9280c8be71f6c9eb1869a5188.1433434659.git.viresh.kumar@linaro.org> <20150617133314.GB15153@linux> <55821F30.2090802@codeaurora.org> <20150618022543.GA28820@linux> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20150618022543.GA28820@linux> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150618_035102_124994_12254F18 X-CRM114-Status: GOOD ( 20.51 ) X-Spam-Score: -2.6 (--) Cc: Nishanth Menon , "devicetree@vger.kernel.org" , Abhilash Kesavan , "linaro-kernel@lists.linaro.org" , Thomas Abraham , Kevin Hilman , "linux-pm@vger.kernel.org" , Viswanath Puttagunta , Santosh Shilimkar , Rafael Wysocki , Olof Johansson , Mark Brown , Mike Turquette , Sudeep Holla , Grant Likely , Arnd Bergmann , Thomas Petazzoni , "linux-arm-kernel@lists.infradead.org" , Lucas Stach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 18-06-15, 07:55, Viresh Kumar wrote: > Why do you think so? For me the operating-points-v2-names property > will be present in CPU node (as there is no OPP node which can have > it) and so every CPU is free to choose what it wants to. So, I had something like this in mind: From: Viresh Kumar Date: Thu, 30 Apr 2015 17:38:00 +0530 Subject: [PATCH] OPP: Allow multiple OPP tables to be passed via DT On some platforms (Like Qualcomm's SoCs), it is not decided until runtime on what OPPs to use. The OPP tables can be fixed at compile time, but which table to use is found out only after reading some efuses (sort of an prom) and knowing characteristics of the SoC. To support such platform we need to pass multiple OPP tables per device and hardware should be able to choose one and only one table out of those. Update operating-points-v2 bindings to support that. Signed-off-by: Viresh Kumar Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Documentation/devicetree/bindings/power/opp.txt | 63 +++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/Documentation/devicetree/bindings/power/opp.txt b/Documentation/devicetree/bindings/power/opp.txt index 259bf00edf7d..72ccacaac9c9 100644 --- a/Documentation/devicetree/bindings/power/opp.txt +++ b/Documentation/devicetree/bindings/power/opp.txt @@ -45,10 +45,21 @@ Devices supporting OPPs must set their "operating-points-v2" property with phandle to a OPP table in their DT node. The OPP core will use this phandle to find the operating points for the device. +Devices may want to choose OPP tables at runtime and so can provide a list of +phandles here. But only *one* of them should be chosen at runtime. This must be +accompanied by a corresponding "operating-points-v2-names" property, to uniquely +identify the OPP tables. + If required, this can be extended for SoC vendor specfic bindings. Such bindings should be documented as Documentation/devicetree/bindings/power/-opp.txt and should have a compatible description like: "operating-points-v2-". +Optional properties: +- operating-points-v2-names: Names of OPP tables (required if multiple OPP + tables are present), to uniquely identify them. The same list must be present + for all the CPUs which are sharing clock/voltage rails and hence the OPP + tables. + * OPP Table Node This describes the OPPs belonging to a device. This node can have following @@ -63,11 +74,16 @@ This describes the OPPs belonging to a device. This node can have following reference an OPP. Optional properties: +- opp-name: Name of the OPP table, to uniquely identify it if more than one OPP + table is supplied in "operating-points-v2" property of device. + - opp-shared: Indicates that device nodes using this OPP Table Node's phandle switch their DVFS state together, i.e. they share clock/voltage/current lines. Missing property means devices have independent clock/voltage/current lines, but they share OPP tables. +- status: Marks the OPP table enabled/disabled. + * OPP Node @@ -396,3 +412,50 @@ Example 4: Handling multiple regulators }; }; }; + +Example 5: Multiple OPP tables + +/ { + cpus { + cpu@0 { + compatible = "arm,cortex-a7"; + ... + + cpu-supply = <&cpu_supply> + operating-points-v2 = <&cpu0_opp_table_slow>, <&cpu0_opp_table_fast>; + operating-points-v2-names = "slow", "fast"; + }; + }; + + cpu0_opp_table_slow: opp_table_slow { + compatible = "operating-points-v2"; + status = "okay"; + opp-shared; + + opp00 { + opp-hz = <600000000>; + ... + }; + + opp01 { + opp-hz = <800000000>; + ... + }; + }; + + cpu0_opp_table_fast: opp_table_fast { + compatible = "operating-points-v2"; + status = "okay"; + opp-shared; + + opp10 { + opp-hz = <1000000000>; + ... + }; + + opp11 { + opp-hz = <1100000000>; + ... + }; + }; +};