From patchwork Sat Jun 20 02:24:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 6650001 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E3AE0C05AC for ; Sat, 20 Jun 2015 02:27:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CA4B120887 for ; Sat, 20 Jun 2015 02:27:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDAB920880 for ; Sat, 20 Jun 2015 02:27:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z68Sd-0000tq-Rt; Sat, 20 Jun 2015 02:24:47 +0000 Received: from mail-pa0-f53.google.com ([209.85.220.53]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z68Sa-0000h5-Iq for linux-arm-kernel@lists.infradead.org; Sat, 20 Jun 2015 02:24:45 +0000 Received: by pabvl15 with SMTP id vl15so49948598pab.1 for ; Fri, 19 Jun 2015 19:24:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=8C6ohhbZfkrgQezp8Lg0xD9u94Uj0/NVHgkm6hkqQZo=; b=WbYSRxpiFEbjtLHEkeONt3FwZExvnlX5EjTyBO6XtVZ4GN2ZVEQjfM8aLsW2WmD6Os LRbSgsld4MoaS4OqRzHCT0xMMNYJ2nQC3tlx1agoWf4ndQott1Fv+I40hkr2p1oFNIXb Iwf/o1SxA+wBTtHL/NKZAtyRKclqaXWczn7odQxZce/wws2sKxCKjU41GX0hgbVbtc55 VhJ3uX1lA3TReZmp0WGUF+efk0rUn90EN+uQpnXJjVYkh1yBHbRYh2koLq+XrVLM1DJx qWFnZsd0L48z+9hZEPIYL6Yo6eHfWfSiva2qsXQ/LE+L1Gz3VhnE9oSkCSFbCor4SwS6 ByEg== X-Gm-Message-State: ALoCoQkHltujDxyxdI8PVpsZOHlIISOmh9Ahh80WWX8MTUJall0GZJVnTr/9UuAMHnjm0dHW99f6 X-Received: by 10.66.90.137 with SMTP id bw9mr37548522pab.52.1434767062888; Fri, 19 Jun 2015 19:24:22 -0700 (PDT) Received: from localhost ([122.167.70.98]) by mx.google.com with ESMTPSA id fk4sm12454554pbb.80.2015.06.19.19.24.21 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 19 Jun 2015 19:24:21 -0700 (PDT) Date: Sat, 20 Jun 2015 07:54:18 +0530 From: Viresh Kumar To: Rob Herring Subject: Re: [PATCH V7 2/3] OPP: Allow multiple OPP tables to be passed via DT Message-ID: <20150620022418.GB1955@linux> References: <263c128844f5a3c9280c8be71f6c9eb1869a5188.1433434659.git.viresh.kumar@linaro.org> <20150617133314.GB15153@linux> <55821F30.2090802@codeaurora.org> <20150618022543.GA28820@linux> <20150618025034.GB28820@linux> <20150619184747.GD22132@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150619_192444_671851_3FE336E6 X-CRM114-Status: GOOD ( 14.89 ) X-Spam-Score: -0.7 (/) Cc: Nishanth Menon , "devicetree@vger.kernel.org" , Abhilash Kesavan , "linaro-kernel@lists.linaro.org" , Thomas Abraham , Kevin Hilman , "linux-pm@vger.kernel.org" , Viswanath Puttagunta , Stephen Boyd , Santosh Shilimkar , Rafael Wysocki , Olof Johansson , Mark Brown , Mike Turquette , Sudeep Holla , Grant Likely , Arnd Bergmann , Thomas Petazzoni , "linux-arm-kernel@lists.infradead.org" , Lucas Stach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 19-06-15, 13:52, Rob Herring wrote: > On Fri, Jun 19, 2015 at 1:47 PM, Stephen Boyd wrote: > > But isn't this being removed? If it is removed, feel free to add Sigh.. > > Reviewed-by: Stephen Boyd > Acked-by: Rob Herring Thanks. And here is the final Acked version.. ------------------------8<----------------------- From: Viresh Kumar Date: Thu, 30 Apr 2015 17:38:00 +0530 Subject: [PATCH] OPP: Allow multiple OPP tables to be passed via DT On some platforms (Like Qualcomm's SoCs), it is not decided until runtime on what OPPs to use. The OPP tables can be fixed at compile time, but which table to use is found out only after reading some efuses (sort of an prom) and knowing characteristics of the SoC. To support such platform we need to pass multiple OPP tables per device and hardware should be able to choose one and only one table out of those. Update operating-points-v2 bindings to support that. Reviewed-by: Stephen Boyd Acked-by: Rob Herring Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/power/opp.txt | 60 +++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/Documentation/devicetree/bindings/power/opp.txt b/Documentation/devicetree/bindings/power/opp.txt index 259bf00edf7d..3d5d32ca0f97 100644 --- a/Documentation/devicetree/bindings/power/opp.txt +++ b/Documentation/devicetree/bindings/power/opp.txt @@ -45,10 +45,21 @@ Devices supporting OPPs must set their "operating-points-v2" property with phandle to a OPP table in their DT node. The OPP core will use this phandle to find the operating points for the device. +Devices may want to choose OPP tables at runtime and so can provide a list of +phandles here. But only *one* of them should be chosen at runtime. This must be +accompanied by a corresponding "operating-points-names" property, to uniquely +identify the OPP tables. + If required, this can be extended for SoC vendor specfic bindings. Such bindings should be documented as Documentation/devicetree/bindings/power/-opp.txt and should have a compatible description like: "operating-points-v2-". +Optional properties: +- operating-points-names: Names of OPP tables (required if multiple OPP + tables are present), to uniquely identify them. The same list must be present + for all the CPUs which are sharing clock/voltage rails and hence the OPP + tables. + * OPP Table Node This describes the OPPs belonging to a device. This node can have following @@ -68,6 +79,8 @@ This describes the OPPs belonging to a device. This node can have following Missing property means devices have independent clock/voltage/current lines, but they share OPP tables. +- status: Marks the OPP table enabled/disabled. + * OPP Node @@ -396,3 +409,50 @@ Example 4: Handling multiple regulators }; }; }; + +Example 5: Multiple OPP tables + +/ { + cpus { + cpu@0 { + compatible = "arm,cortex-a7"; + ... + + cpu-supply = <&cpu_supply> + operating-points-v2 = <&cpu0_opp_table_slow>, <&cpu0_opp_table_fast>; + operating-points-names = "slow", "fast"; + }; + }; + + cpu0_opp_table_slow: opp_table_slow { + compatible = "operating-points-v2"; + status = "okay"; + opp-shared; + + opp00 { + opp-hz = <600000000>; + ... + }; + + opp01 { + opp-hz = <800000000>; + ... + }; + }; + + cpu0_opp_table_fast: opp_table_fast { + compatible = "operating-points-v2"; + status = "okay"; + opp-shared; + + opp10 { + opp-hz = <1000000000>; + ... + }; + + opp11 { + opp-hz = <1100000000>; + ... + }; + }; +};