From patchwork Tue Sep 15 08:47:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 7180981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D7D80BEEC1 for ; Tue, 15 Sep 2015 08:49:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C2444205C4 for ; Tue, 15 Sep 2015 08:49:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9108F2053A for ; Tue, 15 Sep 2015 08:49:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zblty-0006A9-Dr; Tue, 15 Sep 2015 08:47:46 +0000 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zbltv-00067K-IO for linux-arm-kernel@lists.infradead.org; Tue, 15 Sep 2015 08:47:44 +0000 Received: by pacex6 with SMTP id ex6so171064226pac.0 for ; Tue, 15 Sep 2015 01:47:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=HnN0V14al9wfvzVOwi8Cp8lkguccoR7Qjm091UUsg68=; b=pvrKPkMqkXMI8Gb6eLjnA8gnjf3y5Fyz35xVuSsElLKJqGxOKq+vvOqtqMr8LX5UB4 qQD+BpMJ+xizFbDjWPMwa/sQWYYMSsdAxrHVWqbJzN6zoN2ddVSJ1ZVd4OIwK/mWSjHf JnpyScvztYUGY86EoGrIai/AaH2jHuGp6deAIHLByKRjJUJ1qpjWSu0jGe5jLfp8/bP5 nNicaRrfR5F2If8OSa4Ul3t/UyJaIBIR5XurJpI0Yrz/NYapj37H5aq67fGfo8HiOvgx NeNXCgNRCi2fQ2H78Q6kWyEHCVS4Miun9vrNhTT1es4FrgjRKfJG9Q3z8sfsueu9yvkO AEwQ== X-Received: by 10.66.253.129 with SMTP id aa1mr44445182pad.24.1442306847617; Tue, 15 Sep 2015 01:47:27 -0700 (PDT) Received: from localhost (port-8083.pppoe.wtnet.de. [84.46.31.178]) by smtp.gmail.com with ESMTPSA id wj12sm20726286pac.9.2015.09.15.01.47.26 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 Sep 2015 01:47:26 -0700 (PDT) Date: Tue, 15 Sep 2015 10:47:24 +0200 From: Thierry Reding To: Marcel Ziswiler Subject: Re: [PATCH 00/11] arm: tegra: colibri_t30: fix hdmi, power i2c, wakeup and activate touch Message-ID: <20150915084723.GD25970@ulmo.nvidia.com> References: <1440777586-19545-1-git-send-email-marcel.ziswiler@toradex.com> MIME-Version: 1.0 In-Reply-To: <1440777586-19545-1-git-send-email-marcel.ziswiler@toradex.com> User-Agent: Mutt/1.5.23+102 (2ca89bed6448) (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150915_014743_667050_108DF718 X-CRM114-Status: GOOD ( 21.80 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, Rob Herring , Kumar Gala , linux-tegra@vger.kernel.org, Alexandre Courbot , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Aug 28, 2015 at 05:59:35PM +0200, Marcel Ziswiler wrote: > This series finally continues on my previous Easter efforts (BTW: > thanks all for the feedback and all the patches thereof already having > been applied) and additionally to activating the STMPE811 touch > controller also fixes HDMI, power I2C and the wake-up key. > > > Marcel Ziswiler (11): > arm: tegra: colibri_t30: update hardware revisions compatible comment > arm: tegra: colibri_t30: fix hdmi supply > arm: tegra: colibri_t30: improve comment about thermal alert pin > arm: tegra: colibri_t30: add pin muxing for on-module power i2c > arm: tegra: colibri_t30: fix comment about 3v3 fixed supply > arm: tegra: colibri_t30: add touch pen interrupt pin muxing > arm: tegra: colibri_t30: activate stmpe811 touch controller > arm: tegra: colibri_t30: replace emmc label by comment > arm: tegra: colibri_t30: fix vendor string of m41t0m6 rtc on eval > board > arm: tegra: colibri_t30: add comment concerning sd/mmc for eval board > arm: tegra: colibri_t30: fix power/wakeup key for eval board > > arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 9 +- > arch/arm/boot/dts/tegra30-colibri.dtsi | 124 ++++++++++++++++++++++---- > 2 files changed, 111 insertions(+), 22 deletions(-) Applied all of these with fixups for the subject similar to the Apalis series. I also applied the following on top to consistently align pin names. Thanks, Thierry --- >8 --- From e675c68545ffc4c404cc3f4aa2062b34994efdaf Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 15 Sep 2015 10:29:57 +0200 Subject: [PATCH] ARM: tegra: colibri: Properly align pin names Align pin names on subsequent lines with the first the name of the first pin in the first line. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 72 +++++++++++++++++----------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 67ba9431e386..2d8c58fd9357 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -39,7 +39,7 @@ /* Colibri Backlight PWM */ sdmmc3_dat3_pb4 { - nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,pins = "sdmmc3_dat3_pb4"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; @@ -74,11 +74,11 @@ nvidia,tristate = ; }; kb_row11_ps3 { - nvidia,pins = "kb_row11_ps3", - "kb_row12_ps4", - "kb_row13_ps5", - "kb_row14_ps6", - "kb_row15_ps7"; + nvidia,pins = "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7"; nvidia,function = "sdmmc2"; nvidia,pull = ; nvidia,tristate = ; @@ -86,17 +86,17 @@ /* Colibri SSP */ ulpi_clk_py0 { - nvidia,pins = "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3"; + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc3_dat6_pd3 { - nvidia,pins = "sdmmc3_dat6_pd3", - "sdmmc3_dat7_pd4"; + nvidia,pins = "sdmmc3_dat6_pd3", + "sdmmc3_dat7_pd4"; nvidia,function = "spdif"; nvidia,pull = ; nvidia,tristate = ; @@ -104,14 +104,14 @@ /* Colibri UART_A */ ulpi_data0 { - nvidia,pins = "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0"; + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; @@ -119,10 +119,10 @@ /* Colibri UART_B */ gmi_a16_pj7 { - nvidia,pins = "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7"; + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; nvidia,function = "uartd"; nvidia,pull = ; nvidia,tristate = ; @@ -130,8 +130,8 @@ /* Colibri UART_C */ uart2_rxd { - nvidia,pins = "uart2_rxd_pc3", - "uart2_txd_pc2"; + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; nvidia,function = "uartb"; nvidia,pull = ; nvidia,tristate = ; @@ -139,21 +139,21 @@ /* eMMC */ sdmmc4_clk_pcc4 { - nvidia,pins = "sdmmc4_clk_pcc4", - "sdmmc4_rst_n_pcc3"; + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc4_dat0_paa0 { - nvidia,pins = "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7"; + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ;