Message ID | 20151202103522.GB21461@yury-N73SV (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 02 Dec 2015 10:36:27 +0000 Received: from mail-by2on0054.outbound.protection.outlook.com ([207.46.100.54] helo=na01-by2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a44ls-0003jf-9J for linux-arm-kernel@lists.infradead.org; Wed, 02 Dec 2015 10:36:24 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Yuri.Norov@caviumnetworks.com; Received: from localhost (95.143.213.120) by BLUPR07MB609.namprd07.prod.outlook.com (10.141.207.12) with Microsoft SMTP Server (TLS) id 15.1.337.19; Wed, 2 Dec 2015 10:36:00 +0000 Date: Wed, 2 Dec 2015 13:35:22 +0300 From: Yury Norov <ynorov@caviumnetworks.com> To: Arnd Bergmann <arnd@arndb.de> Subject: Re: [PATCH v6 14/19] arm64:ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it Message-ID: <20151202103522.GB21461@yury-N73SV> References: <1447795019-30176-1-git-send-email-ynorov@caviumnetworks.com> <12844690.Yr8y3jA010@wuerfel> <20151201233503.GA23156@yury-N73SV> <1712431.VUth4NvudT@wuerfel> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1712431.VUth4NvudT@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) X-Originating-IP: [95.143.213.120] X-ClientProxiedBy: DB5PR06CA0031.eurprd06.prod.outlook.com (25.162.165.41) To BLUPR07MB609.namprd07.prod.outlook.com (10.141.207.12) X-Microsoft-Exchange-Diagnostics: 1; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP |
On Wednesday 02 December 2015 13:35:22 Yury Norov wrote: > On Wed, Dec 02, 2015 at 09:37:05AM +0100, Arnd Bergmann wrote: > > The 4*PAGE_SIZE on ARM is an architecture specific oddity, I believe > > to work around aliasing caches on ARMv6. As no other architecture does > > this, we're probably better off not duplicating it for aarch64-ilp32 > > and just use sys_shmat as your v6 patch does. > > Arnd > > If you feel ARMv6 fix for caches will come soon, just ignore it. > Otherwise, please pull it because compat_sys_shmat is broken now > for 64K pages. > > Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> > Sounds good. Will, do you want to take this for the arm64 tree. Acked-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/arm64/include/asm/shmparam.h b/arch/arm64/include/asm/shmparam.h index 4df608a..e368a55 100644 --- a/arch/arm64/include/asm/shmparam.h +++ b/arch/arm64/include/asm/shmparam.h @@ -21,7 +21,7 @@ * alignment value. Since we don't have aliasing D-caches, the rest of * the time we can safely use PAGE_SIZE. */ -#define COMPAT_SHMLBA 0x4000 +#define COMPAT_SHMLBA (4 * PAGE_SIZE) #include <asm-generic/shmparam.h>