From patchwork Fri May 13 21:09:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 9093701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 04E559F372 for ; Fri, 13 May 2016 21:11:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 11FC82020F for ; Fri, 13 May 2016 21:11:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2D9F820256 for ; Fri, 13 May 2016 21:11:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b1KLa-0000Wh-9r; Fri, 13 May 2016 21:10:10 +0000 Received: from mail-pf0-x22b.google.com ([2607:f8b0:400e:c00::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1b1KLW-0007hr-TM for linux-arm-kernel@lists.infradead.org; Fri, 13 May 2016 21:10:07 +0000 Received: by mail-pf0-x22b.google.com with SMTP id c189so47621134pfb.3 for ; Fri, 13 May 2016 14:09:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=DeCKR0RptB5PWqp23tnn+sJWxO2qHfHd6T9E8ipvZ8M=; b=FcqmQYVRKpyGdhaEehiKtYWdK02/Ik5kudjEmOpNghzrdEbfU505l7wtTvQh/MVU4f md3Y2rleHPA2gT+R8LP9jR1QbVzE3opnweMLxnsBzZD7gAB2xLTiu4vhXf8Bkm0HAIWr WgFVltfAYl26NmQQAZ9sSMJRcEzDQ9iw43W94= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=DeCKR0RptB5PWqp23tnn+sJWxO2qHfHd6T9E8ipvZ8M=; b=RlGNmZ6HDdQyI8ReZMPqvMX5Ocu5wRlrHcdmXZ5EsbN27766+/wsRg5GMj/rybHgop X5t2jxksTh199m94DRiI8PPZSc+Zd3W6UnBSZrkoLqaQYOG9HlRw0Y6lx1QwB0IWe67u KFyeiwoG+dcSQelig7hOIv7jiPYhBzSHlPxmErwphfIiqjgnOoDcWiF3kEAffumZ5284 kXvRFqbdw8YAY0TBn6e3C0vmVEpQw3FjM1B7pbzNkkPCVMTZkbsLfoPVAXYpkceCFkas Okk2tQdMoMDT+I/xDd0CfcD0Jvh86E/IXRvLzAWQpKTDyNS/YB5fIMTv+CKL543+MtT3 EJbg== X-Gm-Message-State: AOPr4FWaJVVmgKpWt9yS5Vk6V5hlntcSbK/E2/MnSSEe0UcP9MejrPqff1Xnx+tAVp5k1dHd X-Received: by 10.98.75.154 with SMTP id d26mr26003905pfj.72.1463173786027; Fri, 13 May 2016 14:09:46 -0700 (PDT) Received: from google.com ([2620:0:1000:1301:393b:d27a:b671:f73c]) by smtp.gmail.com with ESMTPSA id ym8sm29538915pab.22.2016.05.13.14.09.45 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 13 May 2016 14:09:45 -0700 (PDT) Date: Fri, 13 May 2016 14:09:43 -0700 From: Brian Norris To: Kishon Vijay Abraham I Subject: [PATCH v2 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Message-ID: <20160513210943.GB99074@google.com> References: <1463092986-61777-1-git-send-email-briannorris@chromium.org> <1463092986-61777-2-git-send-email-briannorris@chromium.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1463092986-61777-2-git-send-email-briannorris@chromium.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160513_141007_032924_D6128922 X-CRM114-Status: GOOD ( 13.66 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Shawn Lin , Doug Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Brian Norris , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shawn Lin Signal integrity analysis has suggested we set these values. Do this in power_on(), so that they get reconfigured after suspend/resume. Signed-off-by: Shawn Lin Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson Tested-by: Heiko Stuebner --- v2: * Sent only patch 2/4 with version 2, to avoid spamming; will move on to v3 for all patches if I need to send another * Drop 170 MHz comment; this was only applicable to a subtly different Arasan PHY drivers/phy/phy-rockchip-emmc.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c index 48cbe691a889..f2f75cf69af1 100644 --- a/drivers/phy/phy-rockchip-emmc.c +++ b/drivers/phy/phy-rockchip-emmc.c @@ -56,6 +56,19 @@ #define PHYCTRL_DLLRDY_SHIFT 0x5 #define PHYCTRL_DLLRDY_DONE 0x1 #define PHYCTRL_DLLRDY_GOING 0x0 +#define PHYCTRL_FREQSEL_200M 0x0 +#define PHYCTRL_FREQSEL_50M 0x1 +#define PHYCTRL_FREQSEL_100M 0x2 +#define PHYCTRL_FREQSEL_150M 0x3 +#define PHYCTRL_FREQSEL_MASK 0x3 +#define PHYCTRL_FREQSEL_SHIFT 0xc +#define PHYCTRL_DR_MASK 0x7 +#define PHYCTRL_DR_SHIFT 0x4 +#define PHYCTRL_DR_50OHM 0x0 +#define PHYCTRL_DR_33OHM 0x1 +#define PHYCTRL_DR_66OHM 0x2 +#define PHYCTRL_DR_100OHM 0x3 +#define PHYCTRL_DR_40OHM 0x4 struct rockchip_emmc_phy { unsigned int reg_offset; @@ -154,6 +167,20 @@ static int rockchip_emmc_phy_power_on(struct phy *phy) struct rockchip_emmc_phy *rk_phy = phy_get_drvdata(phy); int ret = 0; + /* DLL operation: 200 MHz */ + regmap_write(rk_phy->reg_base, + rk_phy->reg_offset + GRF_EMMCPHY_CON0, + HIWORD_UPDATE(PHYCTRL_FREQSEL_200M, + PHYCTRL_FREQSEL_MASK, + PHYCTRL_FREQSEL_SHIFT)); + + /* Drive impedance: 50 Ohm */ + regmap_write(rk_phy->reg_base, + rk_phy->reg_offset + GRF_EMMCPHY_CON6, + HIWORD_UPDATE(PHYCTRL_DR_50OHM, + PHYCTRL_DR_MASK, + PHYCTRL_DR_SHIFT)); + /* Power up emmc phy analog blocks */ ret = rockchip_emmc_phy_power(rk_phy, PHYCTRL_PDB_PWR_ON); if (ret)