From patchwork Fri Jun 17 17:32:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 9184713 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1B6C2608A2 for ; Fri, 17 Jun 2016 17:35:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 016D3282EE for ; Fri, 17 Jun 2016 17:35:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA6DB28385; Fri, 17 Jun 2016 17:35:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EC8CE282EE for ; Fri, 17 Jun 2016 17:35:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bDxeP-0003KF-OG; Fri, 17 Jun 2016 17:33:49 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bDxeM-0003DR-RQ for linux-arm-kernel@lists.infradead.org; Fri, 17 Jun 2016 17:33:47 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C74F8F; Fri, 17 Jun 2016 10:34:08 -0700 (PDT) Received: from e106794-lin.cambridge.arm.com (e106794-lin.cambridge.arm.com [10.1.207.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 48EBE3F246; Fri, 17 Jun 2016 10:33:25 -0700 (PDT) From: Jean-Philippe Brucker To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] arm64: consolidate context ID for 8-bit ASIDs Date: Fri, 17 Jun 2016 18:32:59 +0100 Message-Id: <20160617173300.4767-1-jean-philippe.brucker@arm.com> X-Mailer: git-send-email 2.8.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160617_103346_910278_9D4BE7E6 X-CRM114-Status: UNSURE ( 6.81 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, will.deacon@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP When a CPU uses 8 bits of ASID, software should write the top 8 bits of TTB registers and TLBI commands as 0. Currently, we put the generation field right above the ASIDs, which leads to writing it into TTB and TLBIs. Hardware is supposed to always ignore those bits, but we shouldn't rely on that. Always use bits [63:16] of context.id for the generation number, and keep bits [15:8] as zero when using 8-bit ASIDs. Signed-off-by: Jean-Philippe Brucker --- arch/arm64/mm/context.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index b7b3978..090bf88 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -38,8 +38,9 @@ static DEFINE_PER_CPU(u64, reserved_asids); static cpumask_t tlb_flush_pending; #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) -#define ASID_FIRST_VERSION (1UL << asid_bits) -#define NUM_USER_ASIDS ASID_FIRST_VERSION +#define GENERATION_SHIFT 16 +#define ASID_FIRST_VERSION (1UL << GENERATION_SHIFT) +#define NUM_USER_ASIDS (1UL << asid_bits) /* Get the ASIDBits supported by the current CPU */ static u32 get_cpu_asid_bits(void)