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[80.217.8.99]) by smtp.gmail.com with ESMTPSA id r196sm3634060lfd.41.2016.07.30.08.56.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 30 Jul 2016 08:56:41 -0700 (PDT) From: codekipper@gmail.com To: maxime.ripard@free-electrons.com Subject: [PATCH v2 1/2] ASoC: sunxi: Add bindings for sun6i to SPDIF Date: Sat, 30 Jul 2016 17:56:37 +0200 Message-Id: <20160730155638.24455-2-codekipper@gmail.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20160730155638.24455-1-codekipper@gmail.com> References: <20160730155638.24455-1-codekipper@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160730_085703_061125_EE9B84BE X-CRM114-Status: GOOD ( 11.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, Marcus Cooper , lgirdwood@gmail.com, linux-kernel@vger.kernel.org, be17068@iperbole.bo.it, linux-sunxi@googlegroups.com, broonie@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marcus Cooper The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its reset is controlled via a separate reset controller. Signed-off-by: Marcus Cooper --- Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 13503aa..0230c4d 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -9,6 +9,7 @@ Required properties: - compatible : should be one of the following: - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC + - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC - reg : Offset and length of the register set for the device. @@ -25,6 +26,8 @@ Required properties: "apb" clock for the spdif bus. "spdif" clock for spdif controller. + - resets : reset specifier for the ahb reset (A31 and newer only) + Example: spdif: spdif@01c21000 {