diff mbox

[2/2] ARM: dts: sun8i: Add extra UART pinmux settings for A23/33

Message ID 20160823055826.20591-2-icenowy@aosc.xyz (mailing list archive)
State New, archived
Headers show

Commit Message

Icenowy Zheng Aug. 23, 2016, 5:58 a.m. UTC
A23/33 have 4 UART controllers outside PRCM. However, the devicetree used
to mentioned only UART0's pinmux settings. Some extra UART controllers have
RTS/CTS, and is suitable for using as bluetooth UART controller.

Add the pinmux settings for the UART controller, to make use of the
bluetooth function of some tablets.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 56 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/sun8i-a23.dtsi     |  7 +++++
 2 files changed, 63 insertions(+)

Comments

Maxime Ripard Aug. 23, 2016, 11:42 a.m. UTC | #1
Hi,

On Tue, Aug 23, 2016 at 01:58:26PM +0800, Icenowy Zheng wrote:
> A23/33 have 4 UART controllers outside PRCM. However, the devicetree used
> to mentioned only UART0's pinmux settings. Some extra UART controllers have
> RTS/CTS, and is suitable for using as bluetooth UART controller.
> 
> Add the pinmux settings for the UART controller, to make use of the
> bluetooth function of some tablets.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Our policy is that we avoid adding unused pinctrl nodes to not cripple
the DT for no particular reason.

So please add only the nodes you'll need in your tablet.

Thanks!
Maxime
Icenowy Zheng Aug. 23, 2016, 1:51 p.m. UTC | #2
23.08.2016, 19:42, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> Hi,
>
> On Tue, Aug 23, 2016 at 01:58:26PM +0800, Icenowy Zheng wrote:
>>  A23/33 have 4 UART controllers outside PRCM. However, the devicetree used
>>  to mentioned only UART0's pinmux settings. Some extra UART controllers have
>>  RTS/CTS, and is suitable for using as bluetooth UART controller.
>>
>>  Add the pinmux settings for the UART controller, to make use of the
>>  bluetooth function of some tablets.
>>
>>  Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>
> Our policy is that we avoid adding unused pinctrl nodes to not cripple
> the DT for no particular reason.
>
> So please add only the nodes you'll need in your tablet.

Then... if what I needs is the PG group of uart1, should I name it as
uart1_pins_a or uart1_pins_b?

>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
Maxime Ripard Aug. 26, 2016, 8:18 p.m. UTC | #3
Hi,

On Tue, Aug 23, 2016 at 09:51:05PM +0800, Icenowy Zheng wrote:
> 
> 
> 23.08.2016, 19:42, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> > Hi,
> >
> > On Tue, Aug 23, 2016 at 01:58:26PM +0800, Icenowy Zheng wrote:
> >>  A23/33 have 4 UART controllers outside PRCM. However, the devicetree used
> >>  to mentioned only UART0's pinmux settings. Some extra UART controllers have
> >>  RTS/CTS, and is suitable for using as bluetooth UART controller.
> >>
> >>  Add the pinmux settings for the UART controller, to make use of the
> >>  bluetooth function of some tablets.
> >>
> >>  Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> >
> > Our policy is that we avoid adding unused pinctrl nodes to not cripple
> > the DT for no particular reason.
> >
> > So please add only the nodes you'll need in your tablet.
> 
> Then... if what I needs is the PG group of uart1, should I name it as
> uart1_pins_a or uart1_pins_b?

We don't have any rules here, whichever comes first wins.

Maxime
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 7e05e09..89ea479 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -361,6 +361,62 @@ 
 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 			};
 
+			uart1_pins_a: uart1@0 {
+				allwinner,pins = "PD10", "PD11";
+				allwinner,function = "uart1";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart1_pins_cts_rts_a: uart1-cts-rts@1 {
+				allwinner,pins = "PD12", "PD13";
+				allwinner,function = "uart1";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart1_pins_b: uart1@1 {
+				allwinner,pins = "PG6", "PG7";
+				allwinner,function = "uart1";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart1_pins_cts_rts_b: uart1-cts-rts@0 {
+				allwinner,pins = "PG8", "PG9";
+				allwinner,function = "uart1";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart2_pins_a: uart2@0 {
+				allwinner,pins = "PB0", "PB1";
+				allwinner,function = "uart2";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart2_pins_cts_rts_a: uart2-cts-rts@1 {
+				allwinner,pins = "PB2", "PB3";
+				allwinner,function = "uart2";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart3_pins_a: uart3@0 {
+				allwinner,pins = "PH6", "PH7";
+				allwinner,function = "uart3";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart3_pins_cts_rts_a: uart3-cts-rts@1 {
+				allwinner,pins = "PH8", "PH9";
+				allwinner,function = "uart3";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
 			mmc0_pins_a: mmc0@0 {
 				allwinner,pins = "PF0", "PF1", "PF2",
 						 "PF3", "PF4", "PF5";
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 92e6616..6b76580 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -123,4 +123,11 @@ 
 	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 		     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+
+	uart3_pins_b: uart3@0 {
+		allwinner,pins = "PD8", "PD9";
+		allwinner,function = "uart3";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
 };