From patchwork Fri Sep 2 17:00:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 9311451 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1C7A160760 for ; Fri, 2 Sep 2016 17:05:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0809F297CB for ; Fri, 2 Sep 2016 17:05:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EFFF429821; Fri, 2 Sep 2016 17:05:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0E29D297CB for ; Fri, 2 Sep 2016 17:05:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfrsR-0000hp-LD; Fri, 02 Sep 2016 17:03:39 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfrsL-0000K2-Bf for linux-arm-kernel@lists.infradead.org; Fri, 02 Sep 2016 17:03:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2014; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=TSJuCM0dsHV4iXL/ig/xhvjEyNLqnDw3zptz7ZftGYU=; b=MLkE4muXCMUyA9dSVD943uQzj/8EfklFIHw+SkBtA6iqqcP4uFbUmSfwQHTcPHCYlxHbxqeIXsoxYk4hymZV1TYYurIkFVaoSTPDPMOVPgtZFspjdOI9XIWDD9zn0OuoT8fYuhGfortY05HMz+uD3U1H6bwhY7BXt6/SZhJRvUQ=; Received: from n2100.armlinux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:55867) by pandora.armlinux.org.uk with esmtpsa (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1bfrpv-0008FW-Kt; Fri, 02 Sep 2016 18:01:04 +0100 Received: from linux by n2100.armlinux.org.uk with local (Exim 4.76) (envelope-from ) id 1bfrpq-0006fb-2R; Fri, 02 Sep 2016 18:00:58 +0100 Date: Fri, 2 Sep 2016 18:00:57 +0100 From: Russell King - ARM Linux To: Linus Walleij Subject: Re: [PATCH 05/33] gpio: add generic single-register fixed-direction GPIO driver Message-ID: <20160902170057.GE1041@n2100.armlinux.org.uk> References: <20160829102328.GA28796@n2100.armlinux.org.uk> <20160830214253.GP1041@n2100.armlinux.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160902_100333_804306_9D1E8279 X-CRM114-Status: GOOD ( 23.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Courbot , linux-pcmcia@lists.infradead.org, Haojian Zhuang , "linux-gpio@vger.kernel.org" , Kristoffer Ericson , "linux-arm-kernel@lists.infradead.org" , Robert Jarzmik , Daniel Mack Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Linus, There's a change I'd like to merge into patch 5 - overall it looks like the below, and allows us to use gpio-reg with the PXA mainstone MST_PCMCIA[01] registers. Some of these GPIO signals have hardware interrupts associated with them, but not all. Do you approve? Thanks. 8<==== From: Russell King Subject: [PATCH] gpio: gpio-reg: add irq mapping for gpio-reg users Add support for mapping gpio-reg gpios to interrupts. This may be a non-linear mapping - some gpios in the register may not even have corresponding interrupts associated with them, so we need to pass an array. Signed-off-by: Russell King Acked-by: Linus Walleij --- arch/arm/mach-pxa/lubbock.c | 2 +- arch/arm/mach-sa1100/assabet.c | 2 +- arch/arm/mach-sa1100/neponset.c | 2 +- drivers/gpio/gpio-reg.c | 25 +++++++++++++++++++++++-- include/linux/gpio/gpio-reg.h | 3 ++- 5 files changed, 28 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 1f7bfabfa4eb..cd401546cea8 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -477,7 +477,7 @@ static void __init lubbock_init(void) lubbock_misc_wr_gc = gpio_reg_init(NULL, (void *)&LUB_MISC_WR, -1, 16, "lubbock", 0, LUB_MISC_WR, - NULL); + NULL, NULL, NULL); if (IS_ERR(lubbock_misc_wr_gc)) { pr_err("Lubbock: unable to register lubbock GPIOs: %ld\n", PTR_ERR(lubbock_misc_wr_gc)); diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 51950454afac..e086c609551c 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -120,7 +120,7 @@ static int __init assabet_init_gpio(void __iomem *reg, u32 def_val) writel_relaxed(def_val, reg); gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val, - assabet_names); + assabet_names, NULL, NULL); if (IS_ERR(gc)) return PTR_ERR(gc); diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 5abc04fb196d..b16de1f0d5d0 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -240,7 +240,7 @@ static int neponset_init_gpio(struct gpio_chip **gcp, struct gpio_chip *gc; gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0, - readl_relaxed(reg), names); + readl_relaxed(reg), names, NULL, NULL); if (IS_ERR(gc)) return PTR_ERR(gc); diff --git a/drivers/gpio/gpio-reg.c b/drivers/gpio/gpio-reg.c index 561e28b4d3aa..39175d373871 100644 --- a/drivers/gpio/gpio-reg.c +++ b/drivers/gpio/gpio-reg.c @@ -19,6 +19,8 @@ struct gpio_reg { u32 direction; u32 out; void __iomem *reg; + struct irq_domain *irqdomain; + const int *irqs; }; #define to_gpio_reg(x) container_of(x, struct gpio_reg, gc) @@ -96,6 +98,17 @@ static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask, spin_unlock_irqrestore(&r->lock, flags); } +static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset) +{ + struct gpio_reg *r = to_gpio_reg(gc); + int irq = r->irqs[offset]; + + if (irq >= 0 && r->irqdomain) + irq = irq_find_mapping(r->irqdomain, irq); + + return irq; +} + /** * gpio_reg_init - add a fixed in/out register as gpio * @dev: optional struct device associated with this register @@ -104,7 +117,12 @@ static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask, * @label: GPIO chip label * @direction: bitmask of fixed direction, one per GPIO signal, 1 = in * @def_out: initial GPIO output value - * @names: array of %num strings describing each GPIO signal + * @names: array of %num strings describing each GPIO signal or %NULL + * @irqdom: irq domain or %NULL + * @irqs: array of %num ints describing the interrupt mapping for each + * GPIO signal, or %NULL. If @irqdom is %NULL, then this + * describes the Linux interrupt number, otherwise it describes + * the hardware interrupt number in the specified irq domain. * * Add a single-register GPIO device containing up to 32 GPIO signals, * where each GPIO has a fixed input or output configuration. Only @@ -114,7 +132,7 @@ static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask, */ struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg, int base, int num, const char *label, u32 direction, u32 def_out, - const char *const *names) + const char *const *names, struct irq_domain *irqdom, const int *irqs) { struct gpio_reg *r; int ret; @@ -136,12 +154,15 @@ struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg, r->gc.set = gpio_reg_set; r->gc.get = gpio_reg_get; r->gc.set_multiple = gpio_reg_set_multiple; + if (irqs) + r->gc.to_irq = gpio_reg_to_irq; r->gc.base = base; r->gc.ngpio = num; r->gc.names = names; r->direction = direction; r->out = def_out; r->reg = reg; + r->irqs = irqs; if (dev) ret = devm_gpiochip_add_data(dev, &r->gc, r); diff --git a/include/linux/gpio/gpio-reg.h b/include/linux/gpio/gpio-reg.h index 0352bec7319a..90e0b9060e6d 100644 --- a/include/linux/gpio/gpio-reg.h +++ b/include/linux/gpio/gpio-reg.h @@ -2,10 +2,11 @@ #define GPIO_REG_H struct device; +struct irq_domain; struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg, int base, int num, const char *label, u32 direction, u32 def_out, - const char *const *names); + const char *const *names, struct irq_domain *irqdom, const int *irqs); int gpio_reg_resume(struct gpio_chip *gc);