From patchwork Fri Sep 30 16:08:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 9358589 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4C961600C8 for ; Fri, 30 Sep 2016 16:10:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AC72280F4 for ; Fri, 30 Sep 2016 16:10:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A8E428156; Fri, 30 Sep 2016 16:10:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 227CD2A0DD for ; Fri, 30 Sep 2016 16:10:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bq0Mo-0004vP-Bx; Fri, 30 Sep 2016 16:08:54 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bq0Mj-0004nS-PA for linux-arm-kernel@lists.infradead.org; Fri, 30 Sep 2016 16:08:51 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 2F01F222C; Fri, 30 Sep 2016 18:08:27 +0200 (CEST) Received: from bbrezillon (LFbn-1-2159-240.w90-76.abo.wanadoo.fr [90.76.216.240]) by mail.free-electrons.com (Postfix) with ESMTPSA id DBE9FA66; Fri, 30 Sep 2016 18:08:26 +0200 (CEST) Date: Fri, 30 Sep 2016 18:08:26 +0200 From: Boris Brezillon To: Maxime Ripard Subject: Re: [PATCH] drm/sun4i: Check that the plane coordinates are not negative Message-ID: <20160930180826.169e3daf@bbrezillon> In-Reply-To: <20160930143320.26241-1-maxime.ripard@free-electrons.com> References: <20160930143320.26241-1-maxime.ripard@free-electrons.com> X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160930_090850_206933_96E2CDFD X-CRM114-Status: GOOD ( 17.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, 30 Sep 2016 16:33:20 +0200 Maxime Ripard wrote: > Our planes cannot be set at negative coordinates. Make sure we reject such > configuration. > > Reported-by: Boris Brezillon > Signed-off-by: Maxime Ripard > --- > drivers/gpu/drm/sun4i/sun4i_layer.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c > index f0035bf5efea..f5463c4c2cde 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_layer.c > +++ b/drivers/gpu/drm/sun4i/sun4i_layer.c > @@ -29,6 +29,9 @@ struct sun4i_plane_desc { > static int sun4i_backend_layer_atomic_check(struct drm_plane *plane, > struct drm_plane_state *state) > { > + if ((state->crtc_x < 0) || (state->crtc_y < 0)) > + return -EINVAL; > + Hm, I think it's a perfectly valid use case from the DRM framework and DRM user PoV: you may want to place your plane at a negative CRTC offset (which means part of the plane will be hidden). Maybe I'm wrong, but it seems you can support that by adapting the start address of your framebuffer pointer and the layer size. Have you tried doing something like that? --->8--- diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index 3ab560450a82..6b68804f3035 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -110,15 +110,30 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; + int crtc_w, crtc_h, crtc_x, crtc_y; DRM_DEBUG_DRIVER("Updating layer %d\n", layer); + crtc_x = state->crtc_x; + crtc_y = state->crtc_y; + crtc_w = state->crtc_w; + crtc_h = state->crtc_h; + + if (crtc_x < 0) { + crtc_w += crtx_x; + crtc_x = 0; + } + + if (crtc_y < 0) { + crtc_h += crtx_y; + crtc_y = 0; + } + if (plane->type == DRM_PLANE_TYPE_PRIMARY) { DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", state->crtc_w, state->crtc_h); regmap_write(backend->regs, SUN4I_BACKEND_DISSIZE_REG, - SUN4I_BACKEND_DISSIZE(state->crtc_w, - state->crtc_h)); + SUN4I_BACKEND_DISSIZE(crtc_w, crtc_h)); } /* Set the line width */ @@ -130,15 +145,13 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend, DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", state->crtc_w, state->crtc_h); regmap_write(backend->regs, SUN4I_BACKEND_LAYSIZE_REG(layer), - SUN4I_BACKEND_LAYSIZE(state->crtc_w, - state->crtc_h)); + SUN4I_BACKEND_LAYSIZE(crtc_w, crtc_h)); /* Set base coordinates */ DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n", state->crtc_x, state->crtc_y); regmap_write(backend->regs, SUN4I_BACKEND_LAYCOOR_REG(layer), - SUN4I_BACKEND_LAYCOOR(state->crtc_x, - state->crtc_y)); + SUN4I_BACKEND_LAYCOOR(crtc_x, crtc_y)); return 0; } @@ -198,6 +211,12 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend, paddr += (state->src_x >> 16) * bpp; paddr += (state->src_y >> 16) * fb->pitches[0]; + if (state->crtc_x < 0) + paddr -= bpp * state->crtc_x; + + if (state->crtc_y < 0) + paddr -= fb->pitches[0] * state->crtc_y; + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); /* Write the 32 lower bits of the address (in bits) */