From patchwork Thu Oct 27 18:56:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 9400223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2F78660231 for ; Thu, 27 Oct 2016 18:59:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 149042A380 for ; Thu, 27 Oct 2016 18:59:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 06C382A382; Thu, 27 Oct 2016 18:59:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9807F2A380 for ; Thu, 27 Oct 2016 18:59:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bzps2-0004ZC-FG; Thu, 27 Oct 2016 18:57:46 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bzprx-0004Tu-39 for linux-arm-kernel@lists.infradead.org; Thu, 27 Oct 2016 18:57:42 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u9RIuuqM006007; Thu, 27 Oct 2016 13:56:56 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9RIuu4Z023204; Thu, 27 Oct 2016 13:56:56 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 27 Oct 2016 13:56:55 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9RIutRg015136; Thu, 27 Oct 2016 13:56:55 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.83.19]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u9RIut327508; Thu, 27 Oct 2016 13:56:55 -0500 (CDT) From: Dave Gerlach To: Arnd Bergmann , Russell King , Dan Williams Subject: [PATCH 1/3] ARM: memremap: implement arch_memremap_exec/exec_nocache Date: Thu, 27 Oct 2016 13:56:10 -0500 Message-ID: <20161027185612.22362-2-d-gerlach@ti.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161027185612.22362-1-d-gerlach@ti.com> References: <20161027185612.22362-1-d-gerlach@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161027_115741_302328_B5FEE84F X-CRM114-Status: UNSURE ( 9.36 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Dave Gerlach , Tony Lindgren , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Alexandre Belloni , linux-omap@vger.kernel.org, Shawn Guo , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce arch_memremap_exec and arch_memremap_exec_nocache for ARM to allow mapping of memory as executable. Some platforms have a requirement to map on-chip memory, such as SRAM, to hold and run code that cannot be executed in DRAM, such as low-level PM code or code to reconfigure the DRAM controller itself. Signed-off-by: Dave Gerlach --- arch/arm/include/asm/io.h | 5 +++++ arch/arm/mm/ioremap.c | 16 ++++++++++++++++ arch/arm/mm/nommu.c | 12 ++++++++++++ 3 files changed, 33 insertions(+) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 021692c64de3..67476a5add20 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -411,6 +411,11 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size); void iounmap(volatile void __iomem *iomem_cookie); #define iounmap iounmap +void *arch_memremap_exec(phys_addr_t phys_addr, size_t size); +void *arch_memremap_exec_nocache(phys_addr_t phys_addr, size_t size); +#define arch_memremap_exec arch_memremap_exec +#define arch_memremap_exec_nocache arch_memremap_exec_nocache + void *arch_memremap_wb(phys_addr_t phys_addr, size_t size); #define arch_memremap_wb arch_memremap_wb diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index ff0eed23ddf1..5c22a7a0b349 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -419,6 +419,22 @@ __arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached) __builtin_return_address(0)); } +void *arch_memremap_exec(phys_addr_t phys_addr, size_t size) +{ + return (__force void *)arch_ioremap_caller(phys_addr, size, + MT_MEMORY_RWX, + __builtin_return_address(0)); +} +EXPORT_SYMBOL(arch_memremap_exec); + +void *arch_memremap_exec_nocache(phys_addr_t phys_addr, size_t size) +{ + return (__force void *)arch_ioremap_caller(phys_addr, size, + MT_MEMORY_RWX_NONCACHED, + __builtin_return_address(0)); +} +EXPORT_SYMBOL(arch_memremap_exec_nocache); + void *arch_memremap_wb(phys_addr_t phys_addr, size_t size) { return (__force void *)arch_ioremap_caller(phys_addr, size, diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 2740967727e2..038922133ec4 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -390,6 +390,18 @@ void *arch_memremap_wb(phys_addr_t phys_addr, size_t size) return (void *)phys_addr; } +void *arch_memremap_exec(phys_addr_t phys_addr, size_t size) +{ + return (void *)phys_addr; +} +EXPORT_SYMBOL(arch_memremap_exec); + +void *arch_memremap_exec_nocache(phys_addr_t phys_addr, size_t size) +{ + return (void *)phys_addr; +} +EXPORT_SYMBOL(arch_memremap_exec_nocache); + void __iounmap(volatile void __iomem *addr) { }