From patchwork Mon Nov 14 15:36:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 9427723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 599E46047D for ; Mon, 14 Nov 2016 15:38:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48CEA28921 for ; Mon, 14 Nov 2016 15:38:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3AB172893C; Mon, 14 Nov 2016 15:38:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B0C0F28921 for ; Mon, 14 Nov 2016 15:38:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c6JJi-0006QV-CX; Mon, 14 Nov 2016 15:37:06 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c6JJe-0006G7-C9 for linux-arm-kernel@lists.infradead.org; Mon, 14 Nov 2016 15:37:03 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2014; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=PjFt557ZN++PqCz3eYlbz2R5hSsC1LQKfl1esaQY2m4=; b=YOsQ/izFjNcMi0MU0y6W3IwQWoh00epfk6pSxbPwSW6708i++8tCOp7USQoXeutYS9Bx84xBeBIDS43PRKhMkO5aLGDnR6l6Yk3/joTikh/BqEdEgckLw1J0MgztwI8a0ji0UTlpllBvxSNcXyGGwHn78MwMNJkj2AcJeQeIRGM=; Received: from n2100.armlinux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:60075) by pandora.armlinux.org.uk with esmtpsa (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1c6JJC-000692-Ni; Mon, 14 Nov 2016 15:36:34 +0000 Received: from linux by n2100.armlinux.org.uk with local (Exim 4.76) (envelope-from ) id 1c6JJ8-0000YY-Rx; Mon, 14 Nov 2016 15:36:30 +0000 Date: Mon, 14 Nov 2016 15:36:30 +0000 From: Russell King - ARM Linux To: linux-arm-kernel@lists.infradead.org, Thomas Gleixner Subject: [PATCH RFC 3/2] ARM: improve arch_irq_work_has_interrupt() Message-ID: <20161114153630.GN1041@n2100.armlinux.org.uk> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161114_073702_866223_BC281FBF X-CRM114-Status: GOOD ( 20.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gregory Clement , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Following on from the previous patch, I think this makes more sense to determine whether we can support IRQ work interrupts. Whether we can support them or not depends on two things: (a) whether the kernel has support for receiving IPIs (b) whether it's possible to send an IPI to CPUs including the raising CPU. (a) is a function of how the kernel is built - and in the case of ARM, it depends whether the kernel is built with SMP enabled or not. (b) is a property of the interrupt controller. It hasn't ever been a function of the CPU or architecture. Commit 059e232089e4 ("irqchip/gic: Allow self-SGIs for SMP on UP configurations") changes the GIC IPI code such that we can raise SGIs on uniprocessor systems running on a SMP kernel, which means we can support IRQ work interrupts here as well. So, we shouldn't be using cpu_smp() (or its previous is_smp() here at all. Use a flag to indicate whether we can IPI and use that to indicate whether we support irq work interrupts. Signed-off-by: Russell King --- arch/arm/include/asm/irq_work.h | 11 +++++++++-- arch/arm/kernel/irq.c | 0 arch/arm/kernel/smp.c | 3 +++ drivers/irqchip/irq-gic.c | 17 +++++++++++++---- 4 files changed, 25 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/irq_work.h b/arch/arm/include/asm/irq_work.h index 2dc8d7995b48..d7262a3c2f2e 100644 --- a/arch/arm/include/asm/irq_work.h +++ b/arch/arm/include/asm/irq_work.h @@ -1,11 +1,18 @@ #ifndef __ASM_ARM_IRQ_WORK_H #define __ASM_ARM_IRQ_WORK_H -#include +extern bool irq_controller_can_ipi; +#define irq_controller_can_ipi irq_controller_can_ipi static inline bool arch_irq_work_has_interrupt(void) { - return cpu_smp(); +#ifdef CONFIG_SMP + /* This depends on the IRQ controller */ + return irq_controller_can_ipi; +#else + /* The kernel is not built to support IPIs */ + return false; +#endif } #endif /* _ASM_ARM_IRQ_WORK_H */ diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 7dd14e8395e6..1fa9412cc4aa 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -473,6 +473,9 @@ void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) __smp_cross_call = fn; } +/* This indicates whether the IRQ controller can IPI (including self-IPI) */ +bool irq_controller_can_ipi; + static const char *ipi_types[NR_IPI] __tracepoint_string = { #define S(x,s) [x] = s S(IPI_WAKEUP, "CPU wakeup interrupts"), diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index d6c404b3584d..abe8d5807c0f 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1187,9 +1187,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, */ for (i = 0; i < NR_GIC_CPU_IF; i++) gic_cpu_map[i] = 0xff; -#ifdef CONFIG_SMP - set_smp_cross_call(gic_raise_softirq); -#endif cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_GIC_STARTING, "AP_IRQ_GIC_STARTING", gic_starting_cpu, NULL); @@ -1207,8 +1204,20 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, } ret = gic_init_bases(gic, irq_start, handle); - if (ret) + if (ret) { kfree(name); + return ret; + } + + if (gic == &gic_data[0]) { +#ifdef CONFIG_SMP + set_smp_cross_call(gic_raise_softirq); +#ifdef irq_controller_can_ipi + if (nr_cpu_ids == 1 || hweight8(gic_cpu_map[0]) == 1) + irq_controller_can_ipi = true; +#endif +#endif + } return ret; }