From patchwork Mon Nov 21 16:04:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 9439733 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3821760469 for ; Mon, 21 Nov 2016 16:07:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DC5E287D4 for ; Mon, 21 Nov 2016 16:07:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 007C628882; Mon, 21 Nov 2016 16:07:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8AA19287D4 for ; Mon, 21 Nov 2016 16:07:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c8r5x-00079A-ME; Mon, 21 Nov 2016 16:05:25 +0000 Received: from mail-wm0-x233.google.com ([2a00:1450:400c:c09::233]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c8r5t-0006ES-83 for linux-arm-kernel@lists.infradead.org; Mon, 21 Nov 2016 16:05:22 +0000 Received: by mail-wm0-x233.google.com with SMTP id t79so152656840wmt.0 for ; Mon, 21 Nov 2016 08:05:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=JQlWhAwICsu5UAlf3Yfdhtpi3kVvS8OpT7Crr6RYtdc=; b=AVVi38N8xBGjynL869D90ZOKnzn2CIbWvJbDxX/dU4OxewH3B2ZPr+3OX9SsmSrQ4S +yMINXTuqySlam/P3wm0m9GvMqh8HFOlmP9xuIqUw0kis/BYsnQJt5rYvtbM3MiEL+ZI 70I+JD5AU3qgxHM7Z+7FVqebqAn2xCFav6fGI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=JQlWhAwICsu5UAlf3Yfdhtpi3kVvS8OpT7Crr6RYtdc=; b=XuCOwM+VG7lpmBNo7+kHuhGZbajlKApVAElZvtRDRVAHRgnRYvsnQqC8VNCwO60z4B FtlsxOaD2739aIUExK1lVGHr0FWNspi0K5gJQOR7xqro/m1s+om3WQR+gGaI06CpT2Qo stB4fHnB/bR2kQtShe6ohv3cY7jN4i4ZDU2HUfv7eLhtwKC6631jD0TDlsuIE16iMXB1 wYe8nQ/BLtnMn7/3scRicuQwpuzJRwmjXACKD6RJnNwl1BSwCrFw2IGq3EVupvtpiHW6 VAAjdGyx0t2VOPRN2WeMMsCzQeDeAwoqwLmPTTr2BtVt6VeUzFyWBCvz8cUkwBgQD7mc z5WQ== X-Gm-Message-State: AKaTC01BVd2hj2HjrHMxANW6GR43bVHd1vOKshtqY7R2G/49gpaeRKtFcpg5CKKVup3ojNew X-Received: by 10.28.94.205 with SMTP id s196mr15416744wmb.1.1479744299126; Mon, 21 Nov 2016 08:04:59 -0800 (PST) Received: from mms-0441.wifi.mm-sol.com ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id f126sm20236006wme.22.2016.11.21.08.04.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Nov 2016 08:04:58 -0800 (PST) From: Georgi Djakov To: andy.gross@linaro.org Subject: [PATCH v2] ARM: dts: qcom: Add apq8064 CoreSight components Date: Mon, 21 Nov 2016 18:04:58 +0200 Message-Id: <20161121160458.8328-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.10.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161121_080521_532120_A472B7F1 X-CRM114-Status: GOOD ( 12.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, zhang.chunyan@linaro.org, robh+dt@kernel.org, iivanov.xz@gmail.com, georgi.djakov@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Ivan T. Ivanov" Add initial set of CoreSight components found on Qualcomm apq8064 based platforms, including the IFC6410 board. Signed-off-by: Ivan T. Ivanov Acked-by: Mathieu Poirier Signed-off-by: Georgi Djakov --- Changes since v1 (https://lkml.org/lkml/2016/11/17/474) * Moved everything into the SoC dtsi file as suggested by Stephen Boyd. * Updated commit message. * Got Ack from Mathieu. arch/arm/boot/dts/qcom-apq8064.dtsi | 191 +++++++++++++++++++++++++++++++++++- 1 file changed, 187 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 268bd470c865..2e8dd5d098f3 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -27,7 +28,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + CPU0: cpu@0 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -38,7 +39,7 @@ cpu-idle-states = <&CPU_SPC>; }; - cpu@1 { + CPU1: cpu@1 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -49,7 +50,7 @@ cpu-idle-states = <&CPU_SPC>; }; - cpu@2 { + CPU2: cpu@2 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -60,7 +61,7 @@ cpu-idle-states = <&CPU_SPC>; }; - cpu@3 { + CPU3: cpu@3 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -1416,6 +1417,187 @@ }; }; }; + + etb@1a01000 { + compatible = "coresight-etb10", "arm,primecell"; + reg = <0x1a01000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out0>; + }; + }; + }; + + tpiu@1a03000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x1a03000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpiu_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out1>; + }; + }; + }; + + replicator { + compatible = "arm,coresight-replicator"; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator_out0: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + port@1 { + reg = <1>; + replicator_out1: endpoint { + remote-endpoint = <&tpiu_in>; + }; + }; + port@2 { + reg = <0>; + replicator_in: endpoint { + slave-mode; + remote-endpoint = <&funnel_out>; + }; + }; + }; + }; + + funnel@1a04000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x1a04000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* + * Not described input ports: + * 2 - connected to STM component + * 3 - not-connected + * 6 - not-connected + * 7 - not-connected + */ + port@0 { + reg = <0>; + funnel_in0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out>; + }; + }; + port@1 { + reg = <1>; + funnel_in1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out>; + }; + }; + port@4 { + reg = <4>; + funnel_in4: endpoint { + slave-mode; + remote-endpoint = <&etm2_out>; + }; + }; + port@5 { + reg = <5>; + funnel_in5: endpoint { + slave-mode; + remote-endpoint = <&etm3_out>; + }; + }; + port@8 { + reg = <0>; + funnel_out: endpoint { + remote-endpoint = <&replicator_in>; + }; + }; + }; + }; + + etm@1a1c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x1a1c000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + cpu = <&CPU0>; + + port { + etm0_out: endpoint { + remote-endpoint = <&funnel_in0>; + }; + }; + }; + + etm@1a1d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x1a1d000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + cpu = <&CPU1>; + + port { + etm1_out: endpoint { + remote-endpoint = <&funnel_in1>; + }; + }; + }; + + etm@1a1e000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x1a1e000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + cpu = <&CPU2>; + + port { + etm2_out: endpoint { + remote-endpoint = <&funnel_in4>; + }; + }; + }; + + etm@1a1f000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x1a1f000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + cpu = <&CPU3>; + + port { + etm3_out: endpoint { + remote-endpoint = <&funnel_in5>; + }; + }; + }; }; }; #include "qcom-apq8064-pins.dtsi"