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[2003:dc:d3f3:4504:1935:dcec:f29c:cac0]) by smtp.googlemail.com with ESMTPSA id bf2sm7723067wjc.48.2016.12.02.15.09.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Dec 2016 15:09:01 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, khilman@baylibre.com, carlo@caione.org Subject: [PATCH v2 2/2] ARM64: dts: meson-gxm: add SCPI configuration for GXM Date: Sat, 3 Dec 2016 00:08:49 +0100 Message-Id: <20161202230849.11422-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161202230849.11422-1-martin.blumenstingl@googlemail.com> References: <20161123162040.24843-1-martin.blumenstingl@googlemail.com> <20161202230849.11422-1-martin.blumenstingl@googlemail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161202_150922_933326_4A2785BB X-CRM114-Status: UNSURE ( 7.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the SCPI DVFS clock index and configures the CPU cores accordingly. Signed-off-by: Martin Blumenstingl Tested-by: Neil Armstrong Acked-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index c1974bb..2b1d276e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -85,6 +85,7 @@ reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; }; cpu5: cpu@101 { @@ -93,6 +94,7 @@ reg = <0x0 0x101>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; }; cpu6: cpu@102 { @@ -101,6 +103,7 @@ reg = <0x0 0x102>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; }; cpu7: cpu@103 { @@ -109,6 +112,12 @@ reg = <0x0 0x103>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; }; }; }; + +&scpi_dvfs { + clock-indices = <0 1>; + clock-output-names = "vbig", "vlittle"; +};