| Message ID | 20161213152252.53749-5-icenowy@aosc.xyz (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Dec 13, 2016 at 11:22:50PM +0800, Icenowy Zheng wrote: > An operating point table is needed for the cpu frequency adjusting to > work. > > The operating point table is converted from the common value in > extracted script.fex from many A33 board/tablets. > > 1.344GHz is set as a turbo-mode operating point, as it's described as > "extremity_freq" in the FEX file. (the "max_freq" is 1.2GHz) > > Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> > --- > arch/arm/boot/dts/sun8i-a33.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi > index 504996cbee29..035c058324b8 100644 > --- a/arch/arm/boot/dts/sun8i-a33.dtsi > +++ b/arch/arm/boot/dts/sun8i-a33.dtsi > @@ -46,7 +46,45 @@ > #include <dt-bindings/dma/sun4i-a10.h> > > / { > + cpu0_opp_table: opp_table0 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp@648000000 { > + opp-hz = /bits/ 64 <648000000>; > + opp-microvolt = <1040000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; Please add new lines between the nodes. > + opp@816000000 { > + opp-hz = /bits/ 64 <816000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + opp@1008000000 { > + opp-hz = /bits/ 64 <1008000000>; > + opp-microvolt = <1200000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + opp@1200000000 { > + opp-hz = /bits/ 64 <1200000000>; > + opp-microvolt = <1320000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + opp@1344000000 { > + opp-hz = /bits/ 64 <1344000000>; > + opp-microvolt = <1460000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + turbo-mode; > + }; As far as I know, this OPP is not used by Allwinner, is not usable in any A33 board so far (both the A33-olinuxino and the SinA33 do not allow such a voltage on their CPU regulator), and overvolting and overclocking is something that is very risky, and might lead to stability issues. Please remove this OPP. Maxime
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 504996cbee29..035c058324b8 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -46,7 +46,45 @@ #include <dt-bindings/dma/sun4i-a10.h> / { + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp@648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp@816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1200000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp@1344000000 { + opp-hz = /bits/ 64 <1344000000>; + opp-microvolt = <1460000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + turbo-mode; + }; + }; + cpus { + cpu0: cpu@0 { + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + }; + cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu";
An operating point table is needed for the cpu frequency adjusting to work. The operating point table is converted from the common value in extracted script.fex from many A33 board/tablets. 1.344GHz is set as a turbo-mode operating point, as it's described as "extremity_freq" in the FEX file. (the "max_freq" is 1.2GHz) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> --- arch/arm/boot/dts/sun8i-a33.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+)