From patchwork Sat Jan 7 20:06:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 9503273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 97DAA606E1 for ; Sat, 7 Jan 2017 20:07:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8784228112 for ; Sat, 7 Jan 2017 20:07:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7C338283EE; Sat, 7 Jan 2017 20:07:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3A34028112 for ; Sat, 7 Jan 2017 20:07:58 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cPxHO-0002fQ-N1; Sat, 07 Jan 2017 20:07:54 +0000 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cPxHA-0002Nn-Es for linux-arm-kernel@lists.infradead.org; Sat, 07 Jan 2017 20:07:43 +0000 Received: by mail-pg0-x241.google.com with SMTP id b1so47411538pgc.1 for ; Sat, 07 Jan 2017 12:07:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6q0XwzqKjsJbo/sbBpV/898wk6TvfZzthlKq3idBW88=; b=uRswzzlJy5dVEvKt9tw06+P+m+A7xaRGt7If11f7BdLPGiG0ca0e7vZcOjLD9S/tHq zHT6HWV8Yf60PHjvleaJpg503P5PD8ZEj53bHV4nFfmKDWv4J7aUmARZnw6LwF3ZVxbs Itk1rI7IQR6/s5elCDY/yvlU0OlnDO7JR6udUgJ0PGVh47D3/i4bnDes+RZ9B5+6Zmcx mvOiLh//9R/r6WZ8IAn1cw6Qlg0dwYzR34sCs9GeMPCXwcryB0u9vw3ZZRTIX6SP8YZx RtoJ+gk7uT143i9SPapFuklc5wVIRFElqdbkpCcdUQ/Bmi6ZSGAXg8s7lLUlRpzH/yuX Ccrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6q0XwzqKjsJbo/sbBpV/898wk6TvfZzthlKq3idBW88=; b=gXn7BIsl8eKBNGhwizsjv/qfNe5Fth0yxiE5yaouvuTtRVKKyIrqiBKPdcuI2KXFgT 9RCt61+JfcUR55fEoOpxXzvZVmFOvxwzEwGP/OryeGePGhvjUhZ42WaCevmPY3AdlmhE naguvj8Yb/07Kr3IvWagfKcVYjXpkSi6BnkHsCHu5aeC+O4TU+W8+q2Z16skxHeW5ivT QMHuj1PJl4xTk2W490ZTUtaIUEQBsaYhYU7qEl60lpBBa3eF0U1tFrTTJDain+kLzdGe yF9XliXMrDU1QPnMjeFISMRVV37AM1FeRLWmvVGu63UwtbG2LW06vlaKR+FbTGYgnDHh 7h5w== X-Gm-Message-State: AIkVDXKIlcyiY83uM3Y01MODh7FloGRUQV1LgF4uAoq8oahJhtt41ctetpYGyOp/CRxeRg== X-Received: by 10.99.170.79 with SMTP id x15mr151369286pgo.14.1483819640654; Sat, 07 Jan 2017 12:07:20 -0800 (PST) Received: from localhost.localdomain (c-73-19-0-61.hsd1.wa.comcast.net. [73.19.0.61]) by smtp.gmail.com with ESMTPSA id t129sm162004304pgc.32.2017.01.07.12.07.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 07 Jan 2017 12:07:20 -0800 (PST) From: Andrey Smirnov To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/2] ARM: dts: vf610-zii-dev: Add .dts file for rev. C Date: Sat, 7 Jan 2017 12:06:54 -0800 Message-Id: <20170107200654.26056-2-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170107200654.26056-1-andrew.smirnov@gmail.com> References: <20170107200654.26056-1-andrew.smirnov@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170107_120740_658652_743AB51F X-CRM114-Status: GOOD ( 20.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, andrew@lunn.ch, Andrey Smirnov , Vivien Didelot , Russell King , Stefan Agner , linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Nikita Yushchenko , Shawn Guo , cphealy@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add .dts file for rev. C of the board by factoring out commonalities into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving revision specific file from it (vf610-zii-dev-rev-b.dts and vf610-zii-dev-reb-c.dts). Cc: Shawn Guo Cc: Rob Herring Cc: Mark Rutland Cc: Russell King Cc: Sascha Hauer Cc: Stefan Agner Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: andrew@lunn.ch Cc: Vivien Didelot Cc: Nikita Yushchenko Cc: cphealy@gmail.com Signed-off-by: Andrey Smirnov --- Changes since v3: - Added node for AT86RF233 chip on SPI0 Changes since v4: - Renamed switch0@0 and switch1@0 to just switch@0 (switch ID is still retained in those nodes' labels) - Added spacing between children and properties of nodes arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 315 +---------------------- arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 414 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/vf610-zii-dev.dtsi | 383 +++++++++++++++++++++++++++ 4 files changed, 813 insertions(+), 302 deletions(-) create mode 100644 arch/arm/boot/dts/vf610-zii-dev-rev-c.dts create mode 100644 arch/arm/boot/dts/vf610-zii-dev.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index befcd26..9f0d2a1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -442,7 +442,8 @@ dtb-$(CONFIG_SOC_VF610) += \ vf610-cosmic.dtb \ vf610m4-cosmic.dtb \ vf610-twr.dtb \ - vf610-zii-dev-rev-b.dtb + vf610-zii-dev-rev-b.dtb \ + vf610-zii-dev-rev-c.dtb dtb-$(CONFIG_ARCH_MXS) += \ imx23-evk.dtb \ imx23-olinuxino.dtb \ diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts index 2210811..a6e9275 100644 --- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts @@ -43,32 +43,12 @@ */ /dts-v1/; -#include "vf610.dtsi" +#include "vf610-zii-dev.dtsi" / { model = "ZII VF610 Development Board, Rev B"; compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610"; - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - reg = <0x80000000 0x20000000>; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&pinctrl_leds_debug>; - pinctrl-names = "default"; - - debug { - label = "zii:green:debug1"; - gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - mdio-mux { compatible = "mdio-mux-gpio"; pinctrl-0 = <&pinctrl_mdio_mux>; @@ -86,7 +66,7 @@ #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6085"; #address-cells = <1>; #size-cells = <0>; @@ -96,6 +76,7 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; label = "lan0"; @@ -127,6 +108,7 @@ reg = <6>; label = "cpu"; ethernet = <&fec1>; + fixed-link { speed = <100>; full-duplex; @@ -141,7 +123,7 @@ #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: switch@0 { compatible = "marvell,mv88e6085"; #address-cells = <1>; #size-cells = <0>; @@ -151,6 +133,7 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; label = "lan3"; @@ -174,6 +157,7 @@ label = "dsa"; link = <&switch2port9>; phy-mode = "rgmii-txid"; + fixed-link { speed = <1000>; full-duplex; @@ -194,12 +178,15 @@ mdio { #address-cells = <1>; #size-cells = <0>; + switch1phy0: switch1phy0@0 { reg = <0>; }; + switch1phy1: switch1phy0@1 { reg = <1>; }; + switch1phy2: switch1phy0@2 { reg = <2>; }; @@ -222,6 +209,7 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; label = "lan6"; @@ -240,6 +228,7 @@ port@3 { reg = <3>; label = "optical3"; + fixed-link { speed = <1000>; full-duplex; @@ -251,6 +240,7 @@ port@4 { reg = <4>; label = "optical4"; + fixed-link { speed = <1000>; full-duplex; @@ -265,6 +255,7 @@ phy-mode = "rgmii-txid"; link = <&switch1port5 &switch0port5>; + fixed-link { speed = <1000>; full-duplex; @@ -281,25 +272,6 @@ }; }; - reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_mcu"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - usb0_vbus: regulator-usb0-vbus { - compatible = "regulator-fixed"; - pinctrl-0 = <&pinctrl_usb_vbus>; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio0 6 0>; - }; - spi0 { compatible = "spi-gpio"; pinctrl-0 = <&pinctrl_gpio_spi0>; @@ -336,49 +308,6 @@ }; }; -&adc0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_adc0_ad5>; - vref-supply = <®_vcc_3v3_mcu>; - status = "okay"; -}; - -&edma0 { - status = "okay"; -}; - -&esdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esdhc1>; - bus-width = <4>; - status = "okay"; -}; - -&fec0 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec0>; - status = "okay"; -}; - -&fec1 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - status = "okay"; - - fixed-link { - speed = <100>; - full-duplex; - }; - - mdio1: mdio { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - }; -}; - &i2c0 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -403,33 +332,6 @@ interrupt-parent = <&gpio2>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; }; - - lm75@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24c04@50 { - compatible = "atmel,24c04"; - reg = <0x50>; - }; - - at24c04@52 { - compatible = "atmel,24c04"; - reg = <0x52>; - }; - - ds1682@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; }; &i2c2 { @@ -499,120 +401,8 @@ }; }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&usbdev0 { - disable-over-current; - vbus-supply = <&usb0_vbus>; - dr_mode = "host"; - status = "okay"; -}; - -&usbh1 { - disable-over-current; - status = "okay"; -}; - -&usbmisc0 { - status = "okay"; -}; - -&usbmisc1 { - status = "okay"; -}; - -&usbphy0 { - status = "okay"; -}; - -&usbphy1 { - status = "okay"; -}; &iomuxc { - pinctrl_adc0_ad5: adc0ad5grp { - fsl,pins = < - VF610_PAD_PTC30__ADC0_SE5 0x00a1 - >; - }; - - pinctrl_dspi0: dspi0grp { - fsl,pins = < - VF610_PAD_PTB18__DSPI0_CS1 0x1182 - VF610_PAD_PTB19__DSPI0_CS0 0x1182 - VF610_PAD_PTB20__DSPI0_SIN 0x1181 - VF610_PAD_PTB21__DSPI0_SOUT 0x1182 - VF610_PAD_PTB22__DSPI0_SCK 0x1182 - >; - }; - - pinctrl_dspi2: dspi2grp { - fsl,pins = < - VF610_PAD_PTD31__DSPI2_CS1 0x1182 - VF610_PAD_PTD30__DSPI2_CS0 0x1182 - VF610_PAD_PTD29__DSPI2_SIN 0x1181 - VF610_PAD_PTD28__DSPI2_SOUT 0x1182 - VF610_PAD_PTD27__DSPI2_SCK 0x1182 - >; - }; - - pinctrl_esdhc1: esdhc1grp { - fsl,pins = < - VF610_PAD_PTA24__ESDHC1_CLK 0x31ef - VF610_PAD_PTA25__ESDHC1_CMD 0x31ef - VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef - VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef - VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef - VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef - VF610_PAD_PTA7__GPIO_134 0x219d - >; - }; - - pinctrl_fec0: fec0grp { - fsl,pins = < - VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2 - VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3 - VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 - VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 - VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 - VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 - VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 - VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 - VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 - >; - }; - - pinctrl_fec1: fec1grp { - fsl,pins = < - VF610_PAD_PTA6__RMII_CLKIN 0x30d1 - VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 - VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 - VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 - VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 - VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 - VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 - VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 - VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 - VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 - >; - }; - pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 { fsl,pins = < VF610_PAD_PTE27__GPIO_132 0x33e2 @@ -629,39 +419,6 @@ >; }; - pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { - fsl,pins = < - VF610_PAD_PTE14__GPIO_119 0x31c2 - >; - }; - - pinctrl_i2c0: i2c0grp { - fsl,pins = < - VF610_PAD_PTB14__I2C0_SCL 0x37ff - VF610_PAD_PTB15__I2C0_SDA 0x37ff - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - VF610_PAD_PTB16__I2C1_SCL 0x37ff - VF610_PAD_PTB17__I2C1_SDA 0x37ff - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - VF610_PAD_PTA22__I2C2_SCL 0x37ff - VF610_PAD_PTA23__I2C2_SDA 0x37ff - >; - }; - - pinctrl_leds_debug: pinctrl-leds-debug { - fsl,pins = < - VF610_PAD_PTD20__GPIO_74 0x31c2 - >; - }; - pinctrl_mdio_mux: pinctrl-mdio-mux { fsl,pins = < VF610_PAD_PTA18__GPIO_8 0x31c2 @@ -676,48 +433,4 @@ VF610_PAD_PTB28__GPIO_98 0x219d >; }; - - pinctrl_qspi0: qspi0grp { - fsl,pins = < - VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3 - VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff - VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3 - VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3 - VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3 - VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3 - >; - }; - - pinctrl_uart0: uart0grp { - fsl,pins = < - VF610_PAD_PTB10__UART0_TX 0x21a2 - VF610_PAD_PTB11__UART0_RX 0x21a1 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - VF610_PAD_PTB23__UART1_TX 0x21a2 - VF610_PAD_PTB24__UART1_RX 0x21a1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - VF610_PAD_PTD0__UART2_TX 0x21a2 - VF610_PAD_PTD1__UART2_RX 0x21a1 - >; - }; - - pinctrl_usb_vbus: pinctrl-usb-vbus { - fsl,pins = < - VF610_PAD_PTA16__GPIO_6 0x31c2 - >; - }; - - pinctrl_usb0_host: usb0-host-grp { - fsl,pins = < - VF610_PAD_PTD6__GPIO_85 0x0062 - >; - }; }; diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts new file mode 100644 index 0000000..55c9473 --- /dev/null +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts @@ -0,0 +1,414 @@ +/* + * Copyright (C) 2015, 2016 Zodiac Inflight Innovations + * + * Based on an original 'vf610-twr.dts' which is Copyright 2015, + * Freescale Semiconductor, Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "vf610-zii-dev.dtsi" + +/ { + model = "ZII VF610 Development Board, Rev C"; + compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610"; + + mdio-mux { + compatible = "mdio-mux-gpio"; + pinctrl-0 = <&pinctrl_mdio_mux>; + pinctrl-names = "default"; + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH + &gpio0 9 GPIO_ACTIVE_HIGH + &gpio0 25 GPIO_ACTIVE_HIGH>; + mdio-parent-bus = <&mdio1>; + #address-cells = <1>; + #size-cells = <0>; + + mdio_mux_1: mdio@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + switch0: switch@0 { + compatible = "marvell,mv88e6190"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + dsa,member = <0 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&fec1>; + + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@4 { + reg = <4>; + label = "lan4"; + }; + + switch0port10: port@10 { + reg = <10>; + label = "dsa"; + phy-mode = "xgmii"; + link = <&switch1port10>; + }; + }; + }; + }; + + mdio_mux_2: mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + switch1: switch@0 { + compatible = "marvell,mv88e6190"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + dsa,member = <0 1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + label = "lan5"; + }; + + port@2 { + reg = <2>; + label = "lan6"; + }; + + port@3 { + reg = <3>; + label = "lan7"; + }; + + port@4 { + reg = <4>; + label = "lan8"; + }; + + + switch1port10: port@10 { + reg = <10>; + label = "dsa"; + phy-mode = "xgmii"; + link = <&switch0port10>; + }; + }; + }; + }; + + mdio_mux_4: mdio@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&dspi0 { + bus-num = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dspi0>; + status = "okay"; + spi-num-chipselects = <2>; + + m25p128@0 { + compatible = "m25p128", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000000>; + }; + + atzb-rf-233@1 { + compatible = "atmel,at86rf233"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctr_atzb_rf_233>; + + spi-max-frequency = <7500000>; + reg = <1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gpio3>; + xtal-trim = /bits/ 8 <0x06>; + + sleep-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio6 10 GPIO_ACTIVE_HIGH>; + + fsl,spi-cs-sck-delay = <180>; + fsl,spi-sck-cs-delay = <250>; + }; +}; + +&i2c0 { + /* + * U712 + * + * Exposed signals: + * P1 - WE2_CMD + * P2 - WE2_CLK + */ + gpio5: pca9557@18 { + compatible = "nxp,pca9557"; + reg = <0x18>; + gpio-controller; + #gpio-cells = <2>; + }; + + /* + * U121 + * + * Exposed signals: + * I/O0 - ENET_SWR_EN + * I/O1 - ESW1_RESETn + * I/O2 - ARINC_RESET + * I/O3 - DD1_IO_RESET + * I/O4 - ESW2_RESETn + * I/O5 - ESW3_RESETn + * I/O6 - ESW4_RESETn + * I/O8 - TP909 + * I/O9 - FEM_SEL + * I/O10 - WIFI_RESETn + * I/O11 - PHY_RSTn + * I/O12 - OPT1_SD + * I/O13 - OPT2_SD + * I/O14 - OPT1_TX_DIS + * I/O15 - OPT2_TX_DIS + */ + gpio6: sx1503@20 { + compatible = "semtech,sx1503q"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sx1503_20>; + #gpio-cells = <2>; + #interrupt-cells = <2>; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <23 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + interrupt-controller; + + enet_swr_en { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enet-swr-en"; + }; + }; + + /* + * U715 + * + * Exposed signals: + * IO0 - WE1_CLK + * IO1 - WE1_CMD + */ + gpio7: pca9554@22 { + compatible = "nxp,pca9554"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + + }; +}; + +&i2c1 { + at24mac602@00 { + compatible = "atmel,24c02"; + reg = <0x50>; + read-only; + }; +}; + +&i2c2 { + tca9548@70 { + compatible = "nxp,pca9548"; + pinctrl-0 = <&pinctrl_i2c_mux_reset>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + sfp2: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + sfp3: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&gpio0 { + eth0_intrp { + gpio-hog; + gpios = <23 GPIO_ACTIVE_HIGH>; + input; + line-name = "sx1503-irq"; + }; +}; + +&gpio3 { + eth0_intrp { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + input; + line-name = "eth0-intrp"; + }; +}; + +&fec0 { + mdio { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec0_phy_int>; + + interrupt-parent = <&gpio3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + reg = <0>; + }; + }; +}; + +&iomuxc { + pinctr_atzb_rf_233: pinctrl-atzb-rf-233 { + fsl,pins = < + VF610_PAD_PTB2__GPIO_24 0x31c2 + VF610_PAD_PTE27__GPIO_132 0x33e2 + >; + }; + + + pinctrl_sx1503_20: pinctrl-sx1503-20 { + fsl,pins = < + VF610_PAD_PTB1__GPIO_23 0x219d + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + VF610_PAD_PTA20__UART3_TX 0x21a2 + VF610_PAD_PTA21__UART3_RX 0x21a1 + >; + }; + + pinctrl_mdio_mux: pinctrl-mdio-mux { + fsl,pins = < + VF610_PAD_PTA18__GPIO_8 0x31c2 + VF610_PAD_PTA19__GPIO_9 0x31c2 + VF610_PAD_PTB3__GPIO_25 0x31c2 + >; + }; + + pinctrl_fec0_phy_int: pinctrl-fec0-phy-int { + fsl,pins = < + VF610_PAD_PTB28__GPIO_98 0x219d + >; + }; +}; diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi new file mode 100644 index 0000000..9f5e2e7 --- /dev/null +++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi @@ -0,0 +1,383 @@ +/* + * Copyright (C) 2015, 2016 Zodiac Inflight Innovations + * + * Based on an original 'vf610-twr.dts' which is Copyright 2015, + * Freescale Semiconductor, Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use +n * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "vf610.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pinctrl_leds_debug>; + pinctrl-names = "default"; + + debug { + label = "zii:green:debug1"; + gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_mcu"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + usb0_vbus: regulator-usb0-vbus { + compatible = "regulator-fixed"; + pinctrl-0 = <&pinctrl_usb_vbus>; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 6 0>; + }; +}; + +&adc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_ad5>; + vref-supply = <®_vcc_3v3_mcu>; + status = "okay"; +}; + +&edma0 { + status = "okay"; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + status = "okay"; +}; + +&fec0 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec0>; + status = "okay"; +}; + +&fec1 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + status = "okay"; + + fixed-link { + speed = <100>; + full-duplex; + }; + + mdio1: mdio { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; +}; + +&i2c0 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + status = "okay"; + + lm75@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + + at24c04@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + }; + + at24c04@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; + + ds1682@6b { + compatible = "dallas,ds1682"; + reg = <0x6b>; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbdev0 { + disable-over-current; + vbus-supply = <&usb0_vbus>; + dr_mode = "host"; + status = "okay"; +}; + +&usbh1 { + disable-over-current; + status = "okay"; +}; + +&usbmisc0 { + status = "okay"; +}; + +&usbmisc1 { + status = "okay"; +}; + +&usbphy0 { + status = "okay"; +}; + +&usbphy1 { + status = "okay"; +}; + +&iomuxc { + pinctrl_adc0_ad5: adc0ad5grp { + fsl,pins = < + VF610_PAD_PTC30__ADC0_SE5 0x00a1 + >; + }; + + pinctrl_dspi0: dspi0grp { + fsl,pins = < + VF610_PAD_PTB18__DSPI0_CS1 0x1182 + VF610_PAD_PTB19__DSPI0_CS0 0x1182 + VF610_PAD_PTB20__DSPI0_SIN 0x1181 + VF610_PAD_PTB21__DSPI0_SOUT 0x1182 + VF610_PAD_PTB22__DSPI0_SCK 0x1182 + >; + }; + + pinctrl_dspi2: dspi2grp { + fsl,pins = < + VF610_PAD_PTD31__DSPI2_CS1 0x1182 + VF610_PAD_PTD30__DSPI2_CS0 0x1182 + VF610_PAD_PTD29__DSPI2_SIN 0x1181 + VF610_PAD_PTD28__DSPI2_SOUT 0x1182 + VF610_PAD_PTD27__DSPI2_SCK 0x1182 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTA7__GPIO_134 0x219d + >; + }; + + pinctrl_fec0: fec0grp { + fsl,pins = < + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2 + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3 + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKIN 0x30d1 + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 + >; + }; + + pinctrl_gpio_spi0: pinctrl-gpio-spi0 { + fsl,pins = < + VF610_PAD_PTB22__GPIO_44 0x33e2 + VF610_PAD_PTB21__GPIO_43 0x33e2 + VF610_PAD_PTB20__GPIO_42 0x33e1 + VF610_PAD_PTB19__GPIO_41 0x33e2 + VF610_PAD_PTB18__GPIO_40 0x33e2 + >; + }; + + pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { + fsl,pins = < + VF610_PAD_PTE14__GPIO_119 0x31c2 + >; + }; + + pinctrl_i2c0: i2c0grp { + fsl,pins = < + VF610_PAD_PTB14__I2C0_SCL 0x37ff + VF610_PAD_PTB15__I2C0_SDA 0x37ff + >; + }; + + pinctrl_i2c0_gpio: i2c0grp-gpio { + fsl,pins = < + VF610_PAD_PTB14__GPIO_36 0x31c2 + VF610_PAD_PTB15__GPIO_37 0x31c2 + >; + }; + + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + VF610_PAD_PTB16__I2C1_SCL 0x37ff + VF610_PAD_PTB17__I2C1_SDA 0x37ff + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + VF610_PAD_PTA22__I2C2_SCL 0x37ff + VF610_PAD_PTA23__I2C2_SDA 0x37ff + >; + }; + + pinctrl_leds_debug: pinctrl-leds-debug { + fsl,pins = < + VF610_PAD_PTD20__GPIO_74 0x31c2 + >; + }; + + pinctrl_qspi0: qspi0grp { + fsl,pins = < + VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3 + VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff + VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3 + VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3 + VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3 + VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x21a2 + VF610_PAD_PTB11__UART0_RX 0x21a1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + VF610_PAD_PTB23__UART1_TX 0x21a2 + VF610_PAD_PTB24__UART1_RX 0x21a1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + VF610_PAD_PTD0__UART2_TX 0x21a2 + VF610_PAD_PTD1__UART2_RX 0x21a1 + >; + }; + + pinctrl_usb_vbus: pinctrl-usb-vbus { + fsl,pins = < + VF610_PAD_PTA16__GPIO_6 0x31c2 + >; + }; + + pinctrl_usb0_host: usb0-host-grp { + fsl,pins = < + VF610_PAD_PTD6__GPIO_85 0x0062 + >; + }; +};