Message ID | 20170215215407.25854-1-cov@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, Feb 15, 2017 at 04:54:07PM -0500, Christopher Covington wrote: > The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a > custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the > BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1 > and 2400v1 SoCs.Checking that the Transmit FIFO Empty (TXFE) bit is 0, > instead of checking that the BUSY bit is 1, works around the issue. Note > this in the customary location. To minimize conflicts, this documentation > update is separate from the code changes, "tty: pl011: Work around QDF2400 > E44 stuck BUSY bit". > > Signed-off-by: Christopher Covington <cov@codeaurora.org> > Acked-by: Russell King <rmk+kernel@armlinux.org.uk> > Acked-by: Mark Rutland <mark.rutland@arm.com> > Acked-by: Timur Tabi <timur@codeaurora.org> > --- > Documentation to go with https://patchwork.kernel.org/patch/9575103/ Please poke me when that goes into -next. I don't want to merge the doc until the patch is queued too. Thanks, Will
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index a71b8095dbd8..bc3d086bc624 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -68,3 +68,5 @@ stable kernels. | | | | | | Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | | Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 | +| Qualcomm Tech. | QDF2432v1 UART | SoC E44 | N/A | +| Qualcomm Tech. | QDF2400v1 UART | SoC E44 | N/A |