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h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qv48deNbJLi1hnpyfyPOsLRCxxWp0maGweNO4Uh9O+8=; b=DywWIID0iJIgV1xdf9tSb3yhamtpTwA2mcibJL73cD05EdkZgrZFZmw4CVJbyd0oxu Z0weUS9PubwmDeYz010Mx1pyKy+QhngQvS036D9N8UfsyXQdKTo6lzfH4g59OY/wXe2f OrrG/vAY7nHMHXkeFslb9EQSW7pja6Pp55aBRyujk4zIgPF5DSEQvvAYUdHbDU6khI8e 7JsUjGLgNWVgmwGp3Wu8E9ZKkh5vG9EEdWXA02AyN5oRquhtK/M+6EHg0NaFXZgsOMRH GEScS3mjHq0FEPrcvQDOvUitJnYgqfcMskgMIZAKaisyK6NIcsZYzGUcZlL+C2wQaia+ 2M2Q== X-Gm-Message-State: AMke39nuOXoCu18UtwZ4Q6xD+2GPVdDClShu6ivEdz+kQfpTZJ5GTQhZN52+cNME7fYXPA== X-Received: by 10.107.129.39 with SMTP id c39mr3997512iod.57.1487276881006; Thu, 16 Feb 2017 12:28:01 -0800 (PST) Received: from CABRO3AP00510.localdomain ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id j19sm4684528iti.3.2017.02.16.12.28.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Feb 2017 12:28:00 -0800 (PST) From: slemieux.tyco@gmail.com To: thierry.reding@gmail.com, robh+dt@kernel.org, vz@mleia.com Subject: [RESEND PATCH 2/3] pwm: lpc32xx: switch driver to one phandle argument for PWM consumers Date: Thu, 16 Feb 2017 15:27:48 -0500 Message-Id: <20170216202749.20653-3-slemieux.tyco@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170216202749.20653-1-slemieux.tyco@gmail.com> References: <20170216202749.20653-1-slemieux.tyco@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170216_122822_218691_B6CD961A X-CRM114-Status: GOOD ( 10.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vladimir Zapolskiy NXP LPC32xx SoCs have two simple independent PWM controllers with a single output each, in this case there is no need to specify PWM channel argument on client side, one cell for setting PWM output frequency is sufficient. The change adds private of_xlate() handling of a single cell value given with a PWM phandle on client side, the handling is taken from the PXA PWM driver. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Sylvain Lemieux --- drivers/pwm/pwm-lpc32xx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index a9b3cff96aac..ce8418101e85 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -92,6 +92,20 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(lpc32xx->clk); } +static struct pwm_device *lpc32xx_pwm_of_xlate(struct pwm_chip *pc, + const struct of_phandle_args *args) +{ + struct pwm_device *pwm; + + pwm = pwm_request_from_chip(pc, 0, NULL); + if (IS_ERR(pwm)) + return pwm; + + pwm->args.period = args->args[0]; + + return pwm; +} + static const struct pwm_ops lpc32xx_pwm_ops = { .config = lpc32xx_pwm_config, .enable = lpc32xx_pwm_enable, @@ -123,6 +137,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) lpc32xx->chip.ops = &lpc32xx_pwm_ops; lpc32xx->chip.npwm = 1; lpc32xx->chip.base = -1; + lpc32xx->chip.of_xlate = lpc32xx_pwm_of_xlate; + lpc32xx->chip.of_pwm_n_cells = 1; ret = pwmchip_add(&lpc32xx->chip); if (ret < 0) {