From patchwork Thu Mar 16 11:45:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 9628005 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0F71860244 for ; Thu, 16 Mar 2017 11:46:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E4FE028514 for ; Thu, 16 Mar 2017 11:46:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D83E8285CE; Thu, 16 Mar 2017 11:46:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 770DD28514 for ; Thu, 16 Mar 2017 11:46:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=rAnoB++shCKdwwm8K8o1DU2zAcy2NQU/SBL9xpGjipg=; b=lIyRqVv4nzfrLkydSHiOQ3irBZ w0gN9jekSUGo/4SixAy5Plk/Sbv8poV7QFRizPfguOJ5MEkIZaYD+BsQ4dmhnGQea7/0+KyTiVIKA dlRHO5Dv+plEh3BifjPulmIFweSYD0Cod/kd4r0xHdEnVAD6MhnvbHpy6bmej4Wapnv58LuV2Zvb6 MDqOYyNFcHcqKoNKJEfxT3+hqX3Mk1LcWSfSzTnWgOa7bOlPyJ32P5o3XClCWGcDMMiY6PTXZHIzS h5010nXq4U+2gQ3dXnO+k+FYqJW57grodDB4rtwQ21rThV3HPU9KQDEZ8jVmim50dlBeiRuRi5lgF hDmwnDYw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1coTro-0003wv-Iv; Thu, 16 Mar 2017 11:46:52 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1coTrO-0003TP-Mc for linux-arm-kernel@lists.infradead.org; Thu, 16 Mar 2017 11:46:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 33EA913D5; Thu, 16 Mar 2017 04:46:07 -0700 (PDT) Received: from approximate.cambridge.arm.com (approximate.cambridge.arm.com [10.1.207.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0ACE53F5C9; Thu, 16 Mar 2017 04:46:05 -0700 (PDT) From: Marc Zyngier To: Christoffer Dall , Peter Maydell , Eric Auger , Andre Przywara Subject: [PATCH 1/2] KVM: arm/arm64: vgic-v2: Expose the correct GICC_PMR values to userspace Date: Thu, 16 Mar 2017 11:45:34 +0000 Message-Id: <20170316114535.25233-2-marc.zyngier@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170316114535.25233-1-marc.zyngier@arm.com> References: <20170316114535.25233-1-marc.zyngier@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170316_044626_807811_5D50ECA2 X-CRM114-Status: GOOD ( 12.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We allow userspace to save/restore the GICC_PMR values in order to allow migration. This value is extracted from GICH_PMCR, where it occupies a 5 bit field. But the canonical PMR is an 8 bit value and we fail to shift the virtual priority, resulting in a non-sensical value being reported to userspace. Fixing it once and for all would be ideal, but that would break migration of guest from old to new kernels. We thus introduce a new GICv2 attribute (KVM_DEV_ARM_VGIC_CTRL_CANONICAL_PMR) that allows userspace to register its interest for the one true representation of PMR. Signed-off-by: Marc Zyngier --- arch/arm/include/uapi/asm/kvm.h | 4 ++-- arch/arm64/include/uapi/asm/kvm.h | 4 ++-- include/kvm/arm_vgic.h | 5 +++++ virt/kvm/arm/vgic/vgic-kvm-device.c | 5 +++++ virt/kvm/arm/vgic/vgic-v2.c | 16 ++++++++++++++++ 5 files changed, 30 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h index 6ebd3e6a1fd1..2852836221c0 100644 --- a/arch/arm/include/uapi/asm/kvm.h +++ b/arch/arm/include/uapi/asm/kvm.h @@ -189,6 +189,8 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) #define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 #define KVM_DEV_ARM_VGIC_GRP_CTRL 4 +#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_VGIC_CTRL_CANONICAL_PMR 1 #define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 @@ -198,8 +200,6 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff #define VGIC_LEVEL_INFO_LINE_LEVEL 0 -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 - /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_TYPE_SHIFT 24 #define KVM_ARM_IRQ_TYPE_MASK 0xff diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index c2860358ae3e..e649dc753759 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -209,6 +209,8 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) #define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 #define KVM_DEV_ARM_VGIC_GRP_CTRL 4 +#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_VGIC_CTRL_CANONICAL_PMR 1 #define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 @@ -218,8 +220,6 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff #define VGIC_LEVEL_INFO_LINE_LEVEL 0 -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 - /* Device Control API on vcpu fd */ #define KVM_ARM_VCPU_PMU_V3_CTRL 0 #define KVM_ARM_VCPU_PMU_V3_IRQ 0 diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index b72dd2ad5f44..af46ec3c427d 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -170,6 +170,8 @@ struct vgic_its { struct vgic_state_iter; +#define VGIC_QUIRK_CANONICAL_PMR 0 + struct vgic_dist { bool in_kernel; bool ready; @@ -218,6 +220,9 @@ struct vgic_dist { struct list_head lpi_list_head; int lpi_list_count; + /* Quirks driven by userspace requests */ + unsigned long quirks; + /* used by vgic-debug */ struct vgic_state_iter *iter; }; diff --git a/virt/kvm/arm/vgic/vgic-kvm-device.c b/virt/kvm/arm/vgic/vgic-kvm-device.c index d181d2baee9c..b4935cd49c24 100644 --- a/virt/kvm/arm/vgic/vgic-kvm-device.c +++ b/virt/kvm/arm/vgic/vgic-kvm-device.c @@ -160,6 +160,10 @@ static int vgic_set_common_attr(struct kvm_device *dev, r = vgic_init(dev->kvm); mutex_unlock(&dev->kvm->lock); return r; + case KVM_DEV_ARM_VGIC_CTRL_CANONICAL_PMR: + set_bit(VGIC_QUIRK_CANONICAL_PMR, + &dev->kvm->arch.vgic.quirks); + break; } break; } @@ -408,6 +412,7 @@ static int vgic_v2_has_attr(struct kvm_device *dev, case KVM_DEV_ARM_VGIC_GRP_CTRL: switch (attr->attr) { case KVM_DEV_ARM_VGIC_CTRL_INIT: + case KVM_DEV_ARM_VGIC_CTRL_CANONICAL_PMR: return 0; } } diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c index b834ecdf3225..87f9dd1eaf1c 100644 --- a/virt/kvm/arm/vgic/vgic-v2.c +++ b/virt/kvm/arm/vgic/vgic-v2.c @@ -191,6 +191,15 @@ void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp) GICH_VMCR_ALIAS_BINPOINT_MASK; vmcr |= (vmcrp->bpr << GICH_VMCR_BINPOINT_SHIFT) & GICH_VMCR_BINPOINT_MASK; + + /* + * If userspace is happy to deal with the normal PMR range (8 + * bits), we need to strip the 3 lowest bits so that we fit + * into the 5 bits that GICv2 gives us on the virtual side. + */ + if (test_bit(VGIC_QUIRK_CANONICAL_PMR, &vcpu->kvm->arch.vgic.quirks)) + vmcrp->pmr >>= 3; + vmcr |= (vmcrp->pmr << GICH_VMCR_PRIMASK_SHIFT) & GICH_VMCR_PRIMASK_MASK; @@ -209,6 +218,13 @@ void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp) GICH_VMCR_BINPOINT_SHIFT; vmcrp->pmr = (vmcr & GICH_VMCR_PRIMASK_MASK) >> GICH_VMCR_PRIMASK_SHIFT; + /* + * If userspace is happy to deal with the normal PMR range (8 + * bits), we need to shift the reduced range (5 bits) to + * expose it as if it was a normal value. + */ + if (test_bit(VGIC_QUIRK_CANONICAL_PMR, &vcpu->kvm->arch.vgic.quirks)) + vmcrp->pmr <<= 3; } void vgic_v2_enable(struct kvm_vcpu *vcpu)