Message ID | 20170317154343.39921-2-icenowy@aosc.xyz (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Mar 17, 2017 at 11:43:41PM +0800, Icenowy Zheng wrote: > Allwinner V3s features a LRADC like the ones in older SoCs. > > Add a device tree node for it. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> > --- > arch/arm/boot/dts/sun8i-v3s.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi > index 71075969e5e6..77bbf5ff9548 100644 > --- a/arch/arm/boot/dts/sun8i-v3s.dtsi > +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi > @@ -238,6 +238,13 @@ > interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > }; > > + lradc: lradc@01c22800 { The node name should reflect the class of the device, so something like adc@.. > + compatible = "allwinner,sun4i-a10-lradc-keys"; Please put a SoC-specific compatible there. Thanks! Maxime
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 71075969e5e6..77bbf5ff9548 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -238,6 +238,13 @@ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x400>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>;
Allwinner V3s features a LRADC like the ones in older SoCs. Add a device tree node for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)