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[77.4.222.180]) by smtp.gmail.com with ESMTPSA id g23sm3562232wme.8.2017.03.31.09.54.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 Mar 2017 09:54:50 -0700 (PDT) From: Helmut Klein To: carlo@caione.org, khilman@baylibre.com Subject: [PATCH v3 4/4] ARM64: dts: meson-gx: add core clock support for uart_A, uart_B and uart_C Date: Fri, 31 Mar 2017 18:54:37 +0200 Message-Id: <20170331165437.26227-5-hgkr.klein@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170331165437.26227-1-hgkr.klein@gmail.com> References: <20170331165437.26227-1-hgkr.klein@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170331_095510_105344_9EFD9925 X-CRM114-Status: UNSURE ( 7.14 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Helmut Klein , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the core clock support for the three none AO UARTs of the meson gxbb & meson gxl SoCs Signed-off-by: Helmut Klein --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 15 +++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 15 +++++++++++++++ 2 files changed, 30 insertions(+) -- 2.11.0 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 04b3324bc132..aa2f75d5cd37 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -524,3 +524,18 @@ &vpu { compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; }; + +&uart_A { + clocks = <&xtal>, <&clkc CLKID_UART0>; + clock-names = "xtal", "core"; +}; + +&uart_B { + clocks = <&xtal>, <&clkc CLKID_UART1>; + clock-names = "xtal", "core"; +}; + +&uart_C { + clocks = <&xtal>, <&clkc CLKID_UART2>; + clock-names = "xtal", "core"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index fe11b5fc61f7..f3cc18fd624a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -381,3 +381,18 @@ &vpu { compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; }; + +&uart_A { + clocks = <&xtal>, <&clkc CLKID_UART0>; + clock-names = "xtal", "core"; +}; + +&uart_B { + clocks = <&xtal>, <&clkc CLKID_UART1>; + clock-names = "xtal", "core"; +}; + +&uart_C { + clocks = <&xtal>, <&clkc CLKID_UART2>; + clock-names = "xtal", "core"; +};