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[RFC,v2,4/4] ARM: sun8i: h3: add support for the thermal sensor in H3

Message ID 20170402133304.56824-5-icenowy@aosc.io (mailing list archive)
State New, archived
Headers show

Commit Message

Icenowy Zheng April 2, 2017, 1:33 p.m. UTC
As we have gained the support for the thermal sensor in H3, we can now
add its device nodes to the device tree.

Add them to the H3 device tree.

The H5 thermal sensor has some differences, and will be added furtherly.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Comments

Quentin Schulz April 2, 2017, 2:34 p.m. UTC | #1
Hi Icenowy,

On 02/04/2017 15:33, Icenowy Zheng wrote:
> As we have gained the support for the thermal sensor in H3, we can now
> add its device nodes to the device tree.
> 
> Add them to the H3 device tree.
> 
> The H5 thermal sensor has some differences, and will be added furtherly.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm/boot/dts/sun8i-h3.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index b36f9f423c39..552217bb9266 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -72,6 +72,32 @@
>  		};
>  	};
>  
> +	iio-hwmon {
> +		compatible = "iio-hwmon";
> +		io-channels = <&ths>;
> +	};
> +
> +	soc {
> +		ths: ths@01c25000 {
> +			compatible = "allwinner,sun8i-h3-ths";
> +			reg = <0x01c25000 0x100>;
> +			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
> +			clock-names = "bus", "ths";
> +			resets = <&ccu RST_BUS_THS>;
> +			#thermal-sensor-cells = <0>;
> +			#io-channel-cells = <0>;
> +		};
> +	};
> +
> +	thermal-zones {
> +		cpu_thermal {
> +			/* milliseconds */
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&ths>;
> +		};

Would it make sense to add the CPU temp trip points in this patch? Or do
we wait to have CPU OPPs and thermal throttling to add them?

I guess you can find them either in the datasheet or in vendor tree.

Thanks,
Quentin
Maxime Ripard April 3, 2017, 6:42 a.m. UTC | #2
On Sun, Apr 02, 2017 at 04:34:55PM +0200, Quentin Schulz wrote:
> Hi Icenowy,
> 
> On 02/04/2017 15:33, Icenowy Zheng wrote:
> > As we have gained the support for the thermal sensor in H3, we can now
> > add its device nodes to the device tree.
> > 
> > Add them to the H3 device tree.
> > 
> > The H5 thermal sensor has some differences, and will be added furtherly.
> > 
> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> > ---
> >  arch/arm/boot/dts/sun8i-h3.dtsi | 26 ++++++++++++++++++++++++++
> >  1 file changed, 26 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> > index b36f9f423c39..552217bb9266 100644
> > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > @@ -72,6 +72,32 @@
> >  		};
> >  	};
> >  
> > +	iio-hwmon {
> > +		compatible = "iio-hwmon";
> > +		io-channels = <&ths>;
> > +	};
> > +
> > +	soc {
> > +		ths: ths@01c25000 {
> > +			compatible = "allwinner,sun8i-h3-ths";
> > +			reg = <0x01c25000 0x100>;
> > +			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
> > +			clock-names = "bus", "ths";
> > +			resets = <&ccu RST_BUS_THS>;
> > +			#thermal-sensor-cells = <0>;
> > +			#io-channel-cells = <0>;
> > +		};
> > +	};
> > +
> > +	thermal-zones {
> > +		cpu_thermal {
> > +			/* milliseconds */
> > +			polling-delay-passive = <250>;
> > +			polling-delay = <1000>;
> > +			thermal-sensors = <&ths>;
> > +		};
> 
> Would it make sense to add the CPU temp trip points in this patch?

No.

This is a separate, unrelated, change that has nothing to do with what
is described either in the commit title or the commit log.

The thermal zone itself shouldn't even be in this patch.

Maxime
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index b36f9f423c39..552217bb9266 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -72,6 +72,32 @@ 
 		};
 	};
 
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&ths>;
+	};
+
+	soc {
+		ths: ths@01c25000 {
+			compatible = "allwinner,sun8i-h3-ths";
+			reg = <0x01c25000 0x100>;
+			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+			clock-names = "bus", "ths";
+			resets = <&ccu RST_BUS_THS>;
+			#thermal-sensor-cells = <0>;
+			#io-channel-cells = <0>;
+		};
+	};
+
+	thermal-zones {
+		cpu_thermal {
+			/* milliseconds */
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+			thermal-sensors = <&ths>;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,