| Message ID | 20170404184518.33610-2-icenowy@aosc.io (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote: > As we added USB0 route auto switching support for A64, add related > device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the > pmu0 memory area for PHY). > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 1c64ea2d23f9..a8916df99048 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -179,8 +179,10 @@ > usbphy: phy@01c19400 { > compatible = "allwinner,sun50i-a64-usb-phy"; > reg = <0x01c19400 0x14>, > + <0x01c1a800 0x4>, > <0x01c1b800 0x4>; > reg-names = "phy_ctrl", > + "pmu0", This breaks the older DTs, and that property isn't documented. Maxime
在 2017年04月05日 15:15, Maxime Ripard 写道: > On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote: >> As we added USB0 route auto switching support for A64, add related >> device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the >> pmu0 memory area for PHY). >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> >> --- >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 1c64ea2d23f9..a8916df99048 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -179,8 +179,10 @@ >> usbphy: phy@01c19400 { >> compatible = "allwinner,sun50i-a64-usb-phy"; >> reg = <0x01c19400 0x14>, >> + <0x01c1a800 0x4>, >> <0x01c1b800 0x4>; >> reg-names = "phy_ctrl", >> + "pmu0", > > This breaks the older DTs, and that property isn't documented. It's already documented. In the H3 dual-route patchset I have already added this. (" * "pmu0" for H3, V3s and A64") P.S. to be compatible with older DTs, I think I should adjust the phy driver, make it enable dual-route function only when pmu0 is present. > > Maxime >
On Wed, Apr 05, 2017 at 03:17:19PM +0800, Icenowy Zheng wrote: > > > 在 2017年04月05日 15:15, Maxime Ripard 写道: > > On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote: > > > As we added USB0 route auto switching support for A64, add related > > > device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the > > > pmu0 memory area for PHY). > > > > > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > > > --- > > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++ > > > 1 file changed, 24 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > > index 1c64ea2d23f9..a8916df99048 100644 > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > > @@ -179,8 +179,10 @@ > > > usbphy: phy@01c19400 { > > > compatible = "allwinner,sun50i-a64-usb-phy"; > > > reg = <0x01c19400 0x14>, > > > + <0x01c1a800 0x4>, > > > <0x01c1b800 0x4>; > > > reg-names = "phy_ctrl", > > > + "pmu0", > > > > This breaks the older DTs, and that property isn't documented. > > It's already documented. > > In the H3 dual-route patchset I have already added this. > > (" * "pmu0" for H3, V3s and A64") This is not in linux-next then, sorry. > P.S. to be compatible with older DTs, I think I should adjust > the phy driver, make it enable dual-route function only when > pmu0 is present. That, or if we're quick enough, we can still add it to 4.11. There's a bit of time left. Maxime
在 2017年04月05日 15:26, Maxime Ripard 写道: > On Wed, Apr 05, 2017 at 03:17:19PM +0800, Icenowy Zheng wrote: >> >> >> 在 2017年04月05日 15:15, Maxime Ripard 写道: >>> On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote: >>>> As we added USB0 route auto switching support for A64, add related >>>> device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the >>>> pmu0 memory area for PHY). >>>> >>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> >>>> --- >>>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++ >>>> 1 file changed, 24 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>>> index 1c64ea2d23f9..a8916df99048 100644 >>>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>>> @@ -179,8 +179,10 @@ >>>> usbphy: phy@01c19400 { >>>> compatible = "allwinner,sun50i-a64-usb-phy"; >>>> reg = <0x01c19400 0x14>, >>>> + <0x01c1a800 0x4>, >>>> <0x01c1b800 0x4>; >>>> reg-names = "phy_ctrl", >>>> + "pmu0", >>> >>> This breaks the older DTs, and that property isn't documented. >> >> It's already documented. >> >> In the H3 dual-route patchset I have already added this. >> >> (" * "pmu0" for H3, V3s and A64") > > This is not in linux-next then, sorry. It's already in next-20160405. > >> P.S. to be compatible with older DTs, I think I should adjust >> the phy driver, make it enable dual-route function only when >> pmu0 is present. > > That, or if we're quick enough, we can still add it to 4.11. There's a > bit of time left. Thus the device tree binding patch and the DT part of this patchset should be all pushed to 4.11 . The device tree binding patch is commit ee73fd7dfc86 ("dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64"). > > Maxime >
On Wed, Apr 05, 2017 at 03:33:09PM +0800, Icenowy Zheng wrote: > > > P.S. to be compatible with older DTs, I think I should adjust > > > the phy driver, make it enable dual-route function only when > > > pmu0 is present. > > > > That, or if we're quick enough, we can still add it to 4.11. There's a > > bit of time left. > > Thus the device tree binding patch and the DT part of this patchset > should be all pushed to 4.11 . > > The device tree binding patch is commit ee73fd7dfc86 ("dt: bindings: > add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64"). It should have always been there. If there is a register for the PHY somewhere, it must be in the DT node. Period. There's not relation to whether the driver actually uses it or not. Please send a patch to add that range for 4.11. Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1c64ea2d23f9..a8916df99048 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -179,8 +179,10 @@ usbphy: phy@01c19400 { compatible = "allwinner,sun50i-a64-usb-phy"; reg = <0x01c19400 0x14>, + <0x01c1a800 0x4>, <0x01c1b800 0x4>; reg-names = "phy_ctrl", + "pmu0", "pmu1"; clocks = <&ccu CLK_USB_PHY0>, <&ccu CLK_USB_PHY1>; @@ -194,6 +196,28 @@ #phy-cells = <1>; }; + ehci0: usb@01c1a000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>;
As we added USB0 route auto switching support for A64, add related device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the pmu0 memory area for PHY). Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)