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Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cvkqX-0000Ck-G2 for linux-arm-kernel@lists.infradead.org; Wed, 05 Apr 2017 13:19:38 +0000 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.84_2) (envelope-from ) id 1cvkq6-00044J-4q; Wed, 05 Apr 2017 15:19:10 +0200 From: Lucas Stach To: Shawn Guo Subject: [PATCH v2 2/3] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible Date: Wed, 5 Apr 2017 15:19:08 +0200 Message-Id: <20170405131909.16880-2-l.stach@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170405131909.16880-1-l.stach@pengutronix.de> References: <20170405131909.16880-1-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170405_091937_670572_8A1C7749 X-CRM114-Status: GOOD ( 10.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Dong Aisheng , patchwork-lst@pengutronix.de, kernel@pengutronix.de, Fabio Estevam , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP While the GPC on i.MX6QP is mostly comptible to the i.MX6Q one, the QuadPlus requires special workarounds for hardware erratum ERR009619. Signed-off-by: Lucas Stach Acked-by: Rob Herring --- Documentation/devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt index 416e12c6755a..181d2cc6f054 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt @@ -5,7 +5,10 @@ The i.MX6 General Power Control (GPC) block contains DVFS load tracking counters and Power Gating Control (PGC). Required properties: -- compatible: Should be "fsl,imx6q-gpc" or "fsl,imx6sl-gpc" +- compatible: Should be one of the following: + - fsl,imx6q-gpc + - fsl,imx6qp-gpc + - fsl,imx6sl-gpc - reg: should be register base and length as documented in the datasheet - interrupts: Should contain one interrupt specifier for the GPC interrupt