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Thu, 20 Apr 2017 21:55:50 +0300 Message-Id: <20170420185550.571168105@cogentembedded.com> User-Agent: quilt/0.64 Date: Thu, 20 Apr 2017 21:51:35 +0300 To: Simon Horman , Rob Herring , Mark Rutland , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 3/3] ARM: dts: sk-rzg1m: add Ether pins MIME-Version: 1.0 Content-Disposition: inline; filename=ARM-dts-sk-rzg1m-add-Ether-pins-v2.patch X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170420_145616_564566_0F8B8B82 X-CRM114-Status: GOOD ( 10.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Magnus Damm , Russell King , linux-arm-kernel@lists.infradead.org, Sergei Shtylyov Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's device tree. Signed-off-by: Sergei Shtylyov --- Changes in version 2: - refreshed the patch. arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts +++ renesas/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts @@ -44,6 +44,16 @@ groups = "scif0_data_d"; function = "scif0"; }; + + ether_pins: ether { + groups = "eth_link", "eth_mdio", "eth_rmii"; + function = "eth"; + }; + + phy1_pins: phy1 { + groups = "intc_irq0"; + function = "intc"; + }; }; &scif0 { @@ -54,6 +64,9 @@ }; ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + phy-handle = <&phy1>; renesas,ether-link-active-low; status = "okay";