diff mbox

[v2,2/2] ARM: sun8i: a83t: add dwmac-sun8i ethernet driver

Message ID 20170607173345.22462-3-clabbe.montjoie@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Corentin Labbe June 7, 2017, 5:33 p.m. UTC 
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Maxime Ripard June 8, 2017, 8:34 a.m. UTC | #1 
On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
> 
> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 01a83406f9ae..7d719b4aeaa9 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -200,6 +200,14 @@
>  			#interrupt-cells = <3>;
>  			#gpio-cells = <3>;
>  
> +			emac_rgmii_pins: emac-rgmii-pins {
> +				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> +				       "PD11", "PD12", "PD13", "PD14", "PD18",
> +				       "PD19", "PD21", "PD22", "PD23";
> +				function = "gmac";
> +				drive-strength = <40>;
> +			};
> +

This is not used anywhere.

Maxime
Corentin Labbe June 8, 2017, 8:42 a.m. UTC | #2 
On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
> On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > ---
> >  arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
> >  1 file changed, 28 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 01a83406f9ae..7d719b4aeaa9 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -200,6 +200,14 @@
> >  			#interrupt-cells = <3>;
> >  			#gpio-cells = <3>;
> >  
> > +			emac_rgmii_pins: emac-rgmii-pins {
> > +				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> > +				       "PD11", "PD12", "PD13", "PD14", "PD18",
> > +				       "PD19", "PD21", "PD22", "PD23";
> > +				function = "gmac";
> > +				drive-strength = <40>;
> > +			};
> > +
> 
> This is not used anywhere.
> 
But will be used by bpim3 board
Maxime Ripard June 8, 2017, 12:48 p.m. UTC | #3 
On Thu, Jun 08, 2017 at 10:42:22AM +0200, Corentin Labbe wrote:
> On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
> > On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> > > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> > > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
> > > 
> > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > ---
> > >  arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
> > >  1 file changed, 28 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > index 01a83406f9ae..7d719b4aeaa9 100644
> > > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > @@ -200,6 +200,14 @@
> > >  			#interrupt-cells = <3>;
> > >  			#gpio-cells = <3>;
> > >  
> > > +			emac_rgmii_pins: emac-rgmii-pins {
> > > +				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> > > +				       "PD11", "PD12", "PD13", "PD14", "PD18",
> > > +				       "PD19", "PD21", "PD22", "PD23";
> > > +				function = "gmac";
> > > +				drive-strength = <40>;
> > > +			};
> > > +
> > 
> > This is not used anywhere.
> > 
> But will be used by bpim3 board

Then will add it when we'll add support for that board, until then,
it's dead code.

Maxime
Chen-Yu Tsai June 9, 2017, 4:35 a.m. UTC | #4 
On Thu, Jun 8, 2017 at 8:48 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Thu, Jun 08, 2017 at 10:42:22AM +0200, Corentin Labbe wrote:
>> On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
>> > On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
>> > > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
>> > > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
>> > >
>> > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
>> > > ---
>> > >  arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
>> > >  1 file changed, 28 insertions(+)
>> > >
>> > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > index 01a83406f9ae..7d719b4aeaa9 100644
>> > > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > @@ -200,6 +200,14 @@
>> > >                   #interrupt-cells = <3>;
>> > >                   #gpio-cells = <3>;
>> > >
>> > > +                 emac_rgmii_pins: emac-rgmii-pins {
>> > > +                         pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
>> > > +                                "PD11", "PD12", "PD13", "PD14", "PD18",
>> > > +                                "PD19", "PD21", "PD22", "PD23";
>> > > +                         function = "gmac";
>> > > +                         drive-strength = <40>;
>> > > +                 };
>> > > +
>> >
>> > This is not used anywhere.
>> >
>> But will be used by bpim3 board
>
> Then will add it when we'll add support for that board, until then,
> it's dead code.

I'll include this in my A83T work branch and resend it when I get around to it.

Thanks
ChenYu
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 01a83406f9ae..7d719b4aeaa9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -200,6 +200,14 @@ 
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
+			emac_rgmii_pins: emac-rgmii-pins {
+				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+				       "PD11", "PD12", "PD13", "PD14", "PD18",
+				       "PD19", "PD21", "PD22", "PD23";
+				function = "gmac";
+				drive-strength = <40>;
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 				       "PF3", "PF4", "PF5";
@@ -266,6 +274,26 @@ 
 			status = "disabled";
 		};
 
+		emac: ethernet@1c30000 {
+			compatible = "allwinner,sun8i-a83t-emac";
+			syscon = <&syscon>;
+			reg = <0x01c30000 0x104>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu 13>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu 27>;
+			clock-names = "stmmaceth";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			mdio: mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		gic: interrupt-controller@1c81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,