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[217.61.220.45]) by smtp.gmail.com with ESMTPSA id b30sm9428952edd.6.2017.07.17.07.27.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Jul 2017 07:27:29 -0700 (PDT) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 05/19] KVM: arm/arm64: Check that system supports split eoi/deactivate Date: Mon, 17 Jul 2017 16:27:04 +0200 Message-Id: <20170717142718.13853-6-cdall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170717142718.13853-1-cdall@linaro.org> References: <20170717142718.13853-1-cdall@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170717_072752_356519_AA0ED841 X-CRM114-Status: GOOD ( 14.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Christoffer Dall , kvm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Some systems without proper firmware and/or hardware description data don't support the split EOI and deactivate operation. On such systems, we cannot leave the physical interrupt active after the timer handler on the host has run, so we cannot support KVM with an in-kernel GIC with the timer changes we about to introduce. This patch makes sure that trying to initialize the KVM GIC code will fail on such systems. Cc: Marc Zyngier Signed-off-by: Christoffer Dall --- drivers/irqchip/irq-gic.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 090991f..b7e4fed 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1391,7 +1391,8 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq) return 0; } -static void __init gic_of_setup_kvm_info(struct device_node *node) +static void __init gic_of_setup_kvm_info(struct device_node *node, + bool supports_deactivate) { int ret; struct resource *vctrl_res = &gic_v2_kvm_info.vctrl; @@ -1411,6 +1412,9 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) if (ret) return; + if (!supports_deactivate) + return; + gic_set_kvm_info(&gic_v2_kvm_info); } @@ -1419,6 +1423,7 @@ gic_of_init(struct device_node *node, struct device_node *parent) { struct gic_chip_data *gic; int irq, ret; + bool has_eoimode; if (WARN_ON(!node)) return -ENODEV; @@ -1436,7 +1441,8 @@ gic_of_init(struct device_node *node, struct device_node *parent) * Disable split EOI/Deactivate if either HYP is not available * or the CPU interface is too small. */ - if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base)) + has_eoimode = gic_check_eoimode(node, &gic->raw_cpu_base); + if (gic_cnt == 0 && !has_eoimode) static_key_slow_dec(&supports_deactivate); ret = __gic_init_bases(gic, -1, &node->fwnode); @@ -1447,7 +1453,7 @@ gic_of_init(struct device_node *node, struct device_node *parent) if (!gic_cnt) { gic_init_physaddr(node); - gic_of_setup_kvm_info(node); + gic_of_setup_kvm_info(node, has_eoimode); } if (parent) {