| Message ID | 20170718131034.25167-4-thomas.petazzoni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Thomas, On mar., juil. 18 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > The two CP110 blocks present in the Armada 8K are identical, so since > there is an SDHCI controller described in the master CP110 > description, it should also be described in the slave CP110. Actually they are not totally identically and there is no SD/eMMC controller on the CP slave. Gregory > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> > --- > arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > index 2e6422a..ef95718 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > @@ -258,6 +258,16 @@ > status = "okay"; > }; > > + cps_sdhci0: sdhci@780000 { > + compatible = "marvell,armada-cp110-sdhci"; > + reg = <0x780000 0x300>; > + interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cps_clk 1 4>; > + dma-coherent; > + status = "disabled"; > + }; > + > cps_crypto: crypto@800000 { > compatible = "inside-secure,safexcel-eip197"; > reg = <0x800000 0x200000>; > -- > 2.9.4 >
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 2e6422a..ef95718 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -258,6 +258,16 @@ status = "okay"; }; + cps_sdhci0: sdhci@780000 { + compatible = "marvell,armada-cp110-sdhci"; + reg = <0x780000 0x300>; + interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core"; + clocks = <&cps_clk 1 4>; + dma-coherent; + status = "disabled"; + }; + cps_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>;
The two CP110 blocks present in the Armada 8K are identical, so since there is an SDHCI controller described in the master CP110 description, it should also be described in the slave CP110. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)