| Message ID | 20170723141354.42646-2-icenowy@aosc.io (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Jul 23, 2017 at 10:13 PM, Icenowy Zheng <icenowy@aosc.io> wrote: > Allwinner H3 features a thermal sensor like the one in A33, but has its > register re-arranged, the clock divider moved to CCU (originally the > clock divider is in ADC) and added a pair of bus clock and reset. > > Update the binding document to cover H3. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
On Mon, Jul 24, 2017 at 2:01 PM, Chen-Yu Tsai <wens@csie.org> wrote: > On Sun, Jul 23, 2017 at 10:13 PM, Icenowy Zheng <icenowy@aosc.io> wrote: >> Allwinner H3 features a thermal sensor like the one in A33, but has its >> register re-arranged, the clock divider moved to CCU (originally the >> clock divider is in ADC) and added a pair of bus clock and reset. >> >> Update the binding document to cover H3. >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > > Reviewed-by: Chen-Yu Tsai <wens@csie.org> One other thing. IIRC the new SoCs have ADC calibration data stored somewhere in the e-fuses. Any chance you would use them, and need to reference them in the device node? ChenYu
On Sun, Jul 23, 2017 at 10:13:50PM +0800, Icenowy Zheng wrote: > Allwinner H3 features a thermal sensor like the one in A33, but has its > register re-arranged, the clock divider moved to CCU (originally the > clock divider is in ADC) and added a pair of bus clock and reset. > > Update the binding document to cover H3. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > Changes in v3: > - Clock name changes. > - Example node name changes. > - Add interupts (not yet used by the driver). > > .../devicetree/bindings/mfd/sun4i-gpadc.txt | 25 ++++++++++++++++++++-- > 1 file changed, 23 insertions(+), 2 deletions(-) Acked-by: Rob Herring <robh@kernel.org>
On Sun, 23 Jul 2017, Icenowy Zheng wrote: > Allwinner H3 features a thermal sensor like the one in A33, but has its > register re-arranged, the clock divider moved to CCU (originally the > clock divider is in ADC) and added a pair of bus clock and reset. > > Update the binding document to cover H3. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > Changes in v3: > - Clock name changes. > - Example node name changes. > - Add interupts (not yet used by the driver). > > .../devicetree/bindings/mfd/sun4i-gpadc.txt | 25 ++++++++++++++++++++-- > 1 file changed, 23 insertions(+), 2 deletions(-) For my own reference: Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
Hello, Sorry for the very-clueless question On Sun, Jul 23, 2017 at 4:13 PM, Icenowy Zheng <icenowy@aosc.io> wrote: > + - clock-names: should be "bus" and "mod", When I first read that, I wondered what value clock-names should eally be given. Then... > + clock-names = "bus", "mod"; OK, now this is clearer, but still the documentation is less documenting than the code itself, sigh... I cannot think of a better wording, though, as a non-native-english speaker. Maybe just add a "(See example below)" would be sufficient... Or decide that this documentation is for clueful ones. WDYT ?
diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt index badff3611a98..986265c59b2a 100644 --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt @@ -4,12 +4,21 @@ The Allwinner SoCs all have an ADC that can also act as a thermal sensor and sometimes as a touchscreen controller. Required properties: - - compatible: "allwinner,sun8i-a33-ths", + - compatible: must contain one of the following compatibles: + - "allwinner,sun8i-a33-ths" + - "allwinner,sun8i-h3-ths" - reg: mmio address range of the chip, - #thermal-sensor-cells: shall be 0, - #io-channel-cells: shall be 0, -Example: +Required properties for the following compatibles: + - "allwinner,sun8i-h3-ths" + - clocks: the bus clock and the input clock of the ADC, + - clock-names: should be "bus" and "mod", + - resets: the bus reset of the ADC, + - interrupts: the sampling interrupt of the ADC, + +Example for A33: ths: ths@01c25000 { compatible = "allwinner,sun8i-a33-ths"; reg = <0x01c25000 0x100>; @@ -17,6 +26,18 @@ Example: #io-channel-cells = <0>; }; +Example for H3: + ths: thermal-sensor@1c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_THS>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + sun4i, sun5i and sun6i SoCs are also supported via the older binding: sun4i resistive touchscreen controller
Allwinner H3 features a thermal sensor like the one in A33, but has its register re-arranged, the clock divider moved to CCU (originally the clock divider is in ADC) and added a pair of bus clock and reset. Update the binding document to cover H3. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- Changes in v3: - Clock name changes. - Example node name changes. - Add interupts (not yet used by the driver). .../devicetree/bindings/mfd/sun4i-gpadc.txt | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-)