From patchwork Wed Aug 16 04:50:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 9902947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D45D6600CA for ; Wed, 16 Aug 2017 04:51:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C52FA28111 for ; Wed, 16 Aug 2017 04:51:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B865028963; Wed, 16 Aug 2017 04:51:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A71BF28111 for ; Wed, 16 Aug 2017 04:51:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CZFwcLAy0Z7U9s5UrPwbHhwU0FXzs7o5Sp/UiqZVYQE=; b=eF4y13KVhYbesU C5ndUrQLUcEwgQQlh5Qo1/zELfc33ak4pDe+VEsryD3ShXAzd/M3xtV4pIcQE2m2UiGsgZqeOOTEW fMqidvUH39r2o0w6Pb+Yovgmp5/ONHkxuk1o7p/PwL/hVO2lMRsJXOg2NbU/OFCqpaAEzoYeIGMXn JVQc2SgcxDvwHJPRk13gf/sn+8iWPsZyCA15CBxkVD36qtWVmqYoilVgxnq3uVp1Z9LKnQEOH3ya8 o6qhQmsdrywiBwxi/jPnhIUCXkiez2+UG0AiWF4xBFWkhMZsoW5twbq/AgmoX9HYZc+w6Wy2drfBV Q9FrUzT0nT8SB0cdXZiQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dhqIr-0000GW-Ke; Wed, 16 Aug 2017 04:51:37 +0000 Received: from lelnx194.ext.ti.com ([198.47.27.80]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dhqIm-00009D-TS; Wed, 16 Aug 2017 04:51:34 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7G4oflF031509; Tue, 15 Aug 2017 23:50:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1502859042; bh=LPJ6MYSApN954HvIwNgzZr55OH475dUdv3VHP3X+K2I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CGwCAXRZ9gUotHVLBA36KoYUk+gdAOYYOpWamI3cdzzPsFMrTR0IT21BG7PPnCKhx CyNLB0put3oNTrxV/pFGVESB4S8UfV+c5Hewbg44YJDoiZpjj1xJJT7A/MMlasZSSP ADYtqoMNhjPhxdt3fC4CXwEdWnhjHLk51qrJzaZs= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7G4ofhs030315; Tue, 15 Aug 2017 23:50:41 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 15 Aug 2017 23:50:41 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 15 Aug 2017 23:50:41 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Tue, 15 Aug 2017 23:50:41 -0500 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7G4oXQ9031788; Tue, 15 Aug 2017 23:50:38 -0500 From: Vignesh R To: Marek Vasut , Cyrille Pitchen , Rob Herring Subject: [PATCH v2 1/5] mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible Date: Wed, 16 Aug 2017 10:20:49 +0530 Message-ID: <20170816045053.15492-2-vigneshr@ti.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170816045053.15492-1-vigneshr@ti.com> References: <20170816045053.15492-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170815_215133_090746_DC2EF66D X-CRM114-Status: UNSURE ( 7.71 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boris Brezillon , Vignesh R , devicetree@vger.kernel.org, Richard Weinberger , linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Brian Norris , David Woodhouse , linux-arm-kernel Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Update binding documentation to add a new compatible for TI 66AK2G SoC, to handle TI SoC specific quirks in the driver. Signed-off-by: Vignesh R Acked-by: Rob Herring --- Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index f248056da24c..7dbe3bd9ac56 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -1,7 +1,9 @@ * Cadence Quad SPI controller Required properties: -- compatible : Should be "cdns,qspi-nor". +- compatible : should be one of the following: + Generic default - "cdns,qspi-nor". + For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor". - reg : Contains two entries, each of which is a tuple consisting of a physical address and length. The first entry is the address and length of the controller register set. The second entry is the