From patchwork Fri Aug 18 12:17:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 9908519 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B5D5B60382 for ; Fri, 18 Aug 2017 12:17:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AAFD128C99 for ; Fri, 18 Aug 2017 12:17:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FF4928C9C; Fri, 18 Aug 2017 12:17:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_LOW, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A9E8728C99 for ; Fri, 18 Aug 2017 12:17:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=WcKEu2GctCnx6kdU15ocRriPXMxwiSuk4xAQ6m4KfdU=; b=t26 pEACeWH4PNUTR65jVEacxOwARrEV+SD260uWss3IKEsD+t/bZCSFBcTmWHnHQEtQQO74eJrdUZX4t Ix00aZSMJmg9Or/my+PxEckSrFEhPpNUt/M0QCo/d8dnZaDEI448fO7zc8uuk+ZAXf/DCWiZ+Koq1 Ow3cBDh/w5g6L4/WOqE9f7DXuqaf6UHwREBRUdh9I3ZjRAWPSDl5JCx9gN25r+uKOeLCu+EiGLxic Mhi5NMcYs5khIg3kChnC2uAe4NsHUwZB0KgBeBoT5mspAwi/+DIcKuGkeyvTJ3rVngyPcynPsvMkn vECFCW/0SlROg+u7w0UkKJ6WfL8Etaw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1digDY-0003gK-UA; Fri, 18 Aug 2017 12:17:36 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1digDU-0003FW-Kb; Fri, 18 Aug 2017 12:17:35 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: rperier) with ESMTPSA id EC249260A0A From: Romain Perier To: Heiko Stuebner Subject: [PATCH v2] arm64: dts: rockchip: Add basic DVFS support for RK3368 Date: Fri, 18 Aug 2017 14:17:01 +0200 Message-Id: <20170818121701.12668-1-romain.perier@collabora.com> X-Mailer: git-send-email 2.11.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170818_051732_983619_31C3A24F X-CRM114-Status: UNSURE ( 7.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Catalin Marinas , Will Deacon , linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Romain Perier , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds and enable the operating points that have been tested and are currently supported by the SoC. This also adds clocks for ARMCLKL and ARMCLKB. Signed-off-by: Romain Perier --- Changes in v2: - Switched to binding v2 for operating-points - Improved commit message - Rebased onto linux-next arch/arm64/boot/dts/rockchip/rk3368.dtsi | 75 +++++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index b6f234f10585..7f42a9111062 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -113,7 +113,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; - + clocks = <&cru ARMCLKL>; + operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; /* min followed by max */ }; @@ -122,6 +123,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; + operating-points-v2 = <&cluster0_opp>; }; cpu_l2: cpu@2 { @@ -129,6 +132,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; + operating-points-v2 = <&cluster0_opp>; }; cpu_l3: cpu@3 { @@ -136,6 +141,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; + operating-points-v2 = <&cluster0_opp>; }; cpu_b0: cpu@100 { @@ -143,7 +150,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; - + clocks = <&cru ARMCLKB>; + operating-points-v2 = <&cluster1_opp>; #cooling-cells = <2>; /* min followed by max */ }; @@ -152,6 +160,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x101>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; + operating-points-v2 = <&cluster1_opp>; }; cpu_b2: cpu@102 { @@ -159,6 +169,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x102>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; + operating-points-v2 = <&cluster1_opp>; }; cpu_b3: cpu@103 { @@ -166,9 +178,68 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x103>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; + operating-points-v2 = <&cluster1_opp>; }; }; + cluster0_opp: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000>; + }; + opp02 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <950000>; + }; + opp03 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1025000>; + }; + opp04 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1125000>; + }; + }; + + cluster1_opp: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000>; + }; + opp02 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <950000>; + }; + opp03 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <975000>; + }; + opp04 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1050000>; + }; + }; + + + + amba { compatible = "simple-bus"; #address-cells = <2>;