diff mbox

clk: imx51: propagate rate across ipu_di*_sel

Message ID 20170818163058.22252-1-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show

Commit Message

Lucas Stach Aug. 18, 2017, 4:30 p.m. UTC
This propagates rate requests from the display interface to the divider
or PLL output, allowing to hit the required display rate in many more
cases.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx51-imx53.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Fabio Estevam Aug. 21, 2017, 2:17 p.m. UTC | #1
On Fri, Aug 18, 2017 at 1:30 PM, Lucas Stach <l.stach@pengutronix.de> wrote:
> This propagates rate requests from the display interface to the divider
> or PLL output, allowing to hit the required display rate in many more
> cases.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Looks good:

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

> ---
>  drivers/clk/imx/clk-imx51-imx53.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
> index 1e3c9ea5f9dc..7bcaf270db11 100644
> --- a/drivers/clk/imx/clk-imx51-imx53.c
> +++ b/drivers/clk/imx/clk-imx51-imx53.c
> @@ -416,10 +416,10 @@ static void __init mx51_clocks_init(struct device_node *np)
>
>         clk[IMX5_CLK_LP_APM]            = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,
>                                                 lp_apm_sel, ARRAY_SIZE(lp_apm_sel));
> -       clk[IMX5_CLK_IPU_DI0_SEL]       = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
> -                                               mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel));
> -       clk[IMX5_CLK_IPU_DI1_SEL]       = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
> -                                               mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel));
> +       clk[IMX5_CLK_IPU_DI0_SEL]       = imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
> +                                               mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel), CLK_SET_RATE_PARENT);
> +       clk[IMX5_CLK_IPU_DI1_SEL]       = imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
> +                                               mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel), CLK_SET_RATE_PARENT);
>         clk[IMX5_CLK_TVE_EXT_SEL]       = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
>                                                 mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel), CLK_SET_RATE_PARENT);
>         clk[IMX5_CLK_TVE_SEL]           = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1,

Wladimir,

Could you please test it and see if it fixes the DVI output issue you
reported earlier?
https://lists.freedesktop.org/archives/dri-devel/2017-April/138155.html

Thanks
Wladimir J. van der Laan Aug. 21, 2017, 3:54 p.m. UTC | #2
Hello Fabio,

On Mon, Aug 21, 2017 at 11:17:01AM -0300, Fabio Estevam wrote:
> On Fri, Aug 18, 2017 at 1:30 PM, Lucas Stach <l.stach@pengutronix.de> wrote:
> Wladimir,
> 
> Could you please test it and see if it fixes the DVI output issue you
> reported earlier?
> https://lists.freedesktop.org/archives/dri-devel/2017-April/138155.html

I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board
with current kernel preventing the display from coming up at all:

    [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    0.831411] [drm] No driver support for vblank timestamp query.
    [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
    [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
    [    0.852720] imx-drm display-subsystem: failed to bind display@di0 (ops imx_pd_ops): -19
    [    0.860994] imx-drm display-subsystem: master bind failed: -19

Will try to debug this later.

Regards,
Wladimir
Nikita Yushchenko Aug. 21, 2017, 3:58 p.m. UTC | #3
> I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board
> with current kernel preventing the display from coming up at all:
> 
>     [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>     [    0.831411] [drm] No driver support for vblank timestamp query.
>     [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
>     [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
>     [    0.852720] imx-drm display-subsystem: failed to bind display@di0 (ops imx_pd_ops): -19
>     [    0.860994] imx-drm display-subsystem: master bind failed: -19

I believe this should be fixed by

commit 799ee2970485dc206c3bf347d6e6827c04d5e4f9
Author: Philipp Zabel <p.zabel@pengutronix.de>
Date:   Mon Jun 12 17:54:29 2017 +0200

  drm/imx: parallel-display: Accept drm_of_find_panel_or_bridge failure


Nikita
Wladimir J. van der Laan Aug. 21, 2017, 4:38 p.m. UTC | #4
Hello Nikita, Fabio,

On Mon, Aug 21, 2017 at 06:58:19PM +0300, Nikita Yushchenko wrote:
> > I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board
> > with current kernel preventing the display from coming up at all:
> > 
> >     [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> >     [    0.831411] [drm] No driver support for vblank timestamp query.
> >     [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
> >     [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
> >     [    0.852720] imx-drm display-subsystem: failed to bind display@di0 (ops imx_pd_ops): -19
> >     [    0.860994] imx-drm display-subsystem: master bind failed: -19
> 
> I believe this should be fixed by
> 
> commit 799ee2970485dc206c3bf347d6e6827c04d5e4f9
> Author: Philipp Zabel <p.zabel@pengutronix.de>
> Date:   Mon Jun 12 17:54:29 2017 +0200
> 
>   drm/imx: parallel-display: Accept drm_of_find_panel_or_bridge failure

Thanks,
With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!

Regards,
Wladimir
Fabio Estevam Aug. 21, 2017, 4:39 p.m. UTC | #5
Hi Wladimir,

On Mon, Aug 21, 2017 at 1:38 PM, Wladimir J. van der Laan
<laanwj@gmail.com> wrote:

> Thanks,
> With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!

Excellent! Maybe you could reply with your Tested-by tag then?
Wladimir J. van der Laan Aug. 21, 2017, 4:44 p.m. UTC | #6
On Mon, Aug 21, 2017 at 01:39:44PM -0300, Fabio Estevam wrote:
> Hi Wladimir,
> 
> On Mon, Aug 21, 2017 at 1:38 PM, Wladimir J. van der Laan
> <laanwj@gmail.com> wrote:
> 
> > Thanks,
> > With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!
> 
> Excellent! Maybe you could reply with your Tested-by tag then?

Sure!

Tested-By: Wladimir J. van der Laan <laanwj@gmail.com>

Regards,
Wladimir
Stephen Boyd Aug. 31, 2017, 6:31 p.m. UTC | #7
On 08/18, Lucas Stach wrote:
> This propagates rate requests from the display interface to the divider
> or PLL output, allowing to hit the required display rate in many more
> cases.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---

Applied to clk-next
diff mbox

Patch

diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
index 1e3c9ea5f9dc..7bcaf270db11 100644
--- a/drivers/clk/imx/clk-imx51-imx53.c
+++ b/drivers/clk/imx/clk-imx51-imx53.c
@@ -416,10 +416,10 @@  static void __init mx51_clocks_init(struct device_node *np)
 
 	clk[IMX5_CLK_LP_APM]		= imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,
 						lp_apm_sel, ARRAY_SIZE(lp_apm_sel));
-	clk[IMX5_CLK_IPU_DI0_SEL]	= imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
-						mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel));
-	clk[IMX5_CLK_IPU_DI1_SEL]	= imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
-						mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel));
+	clk[IMX5_CLK_IPU_DI0_SEL]	= imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
+						mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel), CLK_SET_RATE_PARENT);
+	clk[IMX5_CLK_IPU_DI1_SEL]	= imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
+						mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel), CLK_SET_RATE_PARENT);
 	clk[IMX5_CLK_TVE_EXT_SEL]	= imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
 						mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel), CLK_SET_RATE_PARENT);
 	clk[IMX5_CLK_TVE_SEL]		= imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1,